TW200707646A - Semiconductor device and a method of manufacturing the same - Google Patents

Semiconductor device and a method of manufacturing the same

Info

Publication number
TW200707646A
TW200707646A TW095122398A TW95122398A TW200707646A TW 200707646 A TW200707646 A TW 200707646A TW 095122398 A TW095122398 A TW 095122398A TW 95122398 A TW95122398 A TW 95122398A TW 200707646 A TW200707646 A TW 200707646A
Authority
TW
Taiwan
Prior art keywords
insulating film
fuse
barrier insulating
semiconductor device
manufacturing
Prior art date
Application number
TW095122398A
Other languages
English (en)
Other versions
TWI380404B (zh
Inventor
Katsuhiko Hotta
Satoko Sasahara
Taichi Hayamizu
Yuichi Kono
Original Assignee
Renesas Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Tech Corp filed Critical Renesas Tech Corp
Publication of TW200707646A publication Critical patent/TW200707646A/zh
Application granted granted Critical
Publication of TWI380404B publication Critical patent/TWI380404B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76832Multiple layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76808Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H01L23/5258Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329Insulating materials
    • H01L23/53295Stacked insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
TW095122398A 2005-07-06 2006-06-22 Semiconductor device and a method of manufacturing the same TW200707646A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005197939A JP2007019188A (ja) 2005-07-06 2005-07-06 半導体集積回路装置およびその製造方法

Publications (2)

Publication Number Publication Date
TW200707646A true TW200707646A (en) 2007-02-16
TWI380404B TWI380404B (zh) 2012-12-21

Family

ID=37597735

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095122398A TW200707646A (en) 2005-07-06 2006-06-22 Semiconductor device and a method of manufacturing the same

Country Status (4)

Country Link
US (5) US7419901B2 (zh)
JP (1) JP2007019188A (zh)
CN (1) CN100573871C (zh)
TW (1) TW200707646A (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI555122B (zh) * 2012-05-11 2016-10-21 聯華電子股份有限公司 半導體元件之內連線結構其製備方法

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007019188A (ja) * 2005-07-06 2007-01-25 Renesas Technology Corp 半導体集積回路装置およびその製造方法
US7586132B2 (en) * 2007-06-06 2009-09-08 Micrel, Inc. Power FET with low on-resistance using merged metal layers
US8772156B2 (en) * 2008-05-09 2014-07-08 International Business Machines Corporation Methods of fabricating interconnect structures containing various capping materials for electrical fuse and other related applications
US7956466B2 (en) 2008-05-09 2011-06-07 International Business Machines Corporation Structure for interconnect structure containing various capping materials for electrical fuse and other related applications
US7893520B2 (en) * 2008-05-12 2011-02-22 International Business Machines Corporation Efficient interconnect structure for electrical fuse applications
KR101198758B1 (ko) * 2009-11-25 2012-11-12 엘지이노텍 주식회사 수직구조 반도체 발광소자 및 그 제조방법
US8530320B2 (en) * 2011-06-08 2013-09-10 International Business Machines Corporation High-nitrogen content metal resistor and method of forming same
US20130299993A1 (en) * 2012-05-11 2013-11-14 Hsin-Yu Chen Interconnection of semiconductor device and fabrication method thereof
US9087841B2 (en) * 2013-10-29 2015-07-21 International Business Machines Corporation Self-correcting power grid for semiconductor structures method
JP6448424B2 (ja) * 2015-03-17 2019-01-09 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US9455261B1 (en) 2015-07-10 2016-09-27 Micron Technology, Inc. Integrated structures
TWI590350B (zh) * 2016-06-30 2017-07-01 欣興電子股份有限公司 線路重分佈結構的製造方法與線路重分佈結構單元
KR102616489B1 (ko) 2016-10-11 2023-12-20 삼성전자주식회사 반도체 장치 제조 방법
US20190169837A1 (en) * 2017-12-02 2019-06-06 M-Fire Suppression, Inc. Wild-fire protected shed for storage and protection of personal property during wild-fires
US20190169841A1 (en) * 2017-12-02 2019-06-06 M-Fire Suppression, Inc. Wild-fire protected shed for storage and protection of personal property during wild-fires
JP7055109B2 (ja) * 2019-01-17 2022-04-15 三菱電機株式会社 半導体装置
CN110047799A (zh) * 2019-04-28 2019-07-23 上海华虹宏力半导体制造有限公司 半导体器件的制造方法及半导体器件

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6291891B1 (en) * 1998-01-13 2001-09-18 Kabushiki Kaisha Toshiba Semiconductor device manufacturing method and semiconductor device
US6111301A (en) * 1998-04-24 2000-08-29 International Business Machines Corporation Interconnection with integrated corrosion stop
JP2001085526A (ja) * 1999-09-10 2001-03-30 Hitachi Ltd 半導体装置の製造方法および半導体装置
JP3670552B2 (ja) * 2000-03-27 2005-07-13 株式会社東芝 半導体装置及びその製造方法
US6440833B1 (en) * 2000-07-19 2002-08-27 Taiwan Semiconductor Manufacturing Company Method of protecting a copper pad structure during a fuse opening procedure
JP2002164428A (ja) * 2000-11-29 2002-06-07 Hitachi Ltd 半導体装置およびその製造方法
JP4523194B2 (ja) * 2001-04-13 2010-08-11 富士通セミコンダクター株式会社 半導体装置とその製造方法
JP2003017570A (ja) * 2001-07-02 2003-01-17 Fujitsu Ltd 半導体装置及びその製造方法
JP2003124307A (ja) 2001-10-15 2003-04-25 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP2003142485A (ja) * 2001-11-01 2003-05-16 Mitsubishi Electric Corp 半導体装置及びその製造方法
JP3588612B2 (ja) 2002-02-19 2004-11-17 株式会社東芝 半導体装置
US7067897B2 (en) * 2002-02-19 2006-06-27 Kabushiki Kaisha Toshiba Semiconductor device
US7042095B2 (en) * 2002-03-29 2006-05-09 Renesas Technology Corp. Semiconductor device including an interconnect having copper as a main component
JP4250006B2 (ja) * 2002-06-06 2009-04-08 富士通マイクロエレクトロニクス株式会社 半導体装置及びその製造方法
JP3779243B2 (ja) * 2002-07-31 2006-05-24 富士通株式会社 半導体装置及びその製造方法
JP3898133B2 (ja) * 2003-01-14 2007-03-28 Necエレクトロニクス株式会社 SiCHN膜の成膜方法。
US7094683B2 (en) * 2003-08-04 2006-08-22 Taiwan Semiconductor Manufacturing Co., Ltd. Dual damascene method for ultra low K dielectrics
US7018917B2 (en) * 2003-11-20 2006-03-28 Asm International N.V. Multilayer metallization
JP4673557B2 (ja) * 2004-01-19 2011-04-20 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP2007019188A (ja) * 2005-07-06 2007-01-25 Renesas Technology Corp 半導体集積回路装置およびその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI555122B (zh) * 2012-05-11 2016-10-21 聯華電子股份有限公司 半導體元件之內連線結構其製備方法

Also Published As

Publication number Publication date
US7968966B2 (en) 2011-06-28
US20110169128A1 (en) 2011-07-14
TWI380404B (zh) 2012-12-21
US20080211103A1 (en) 2008-09-04
US8269309B2 (en) 2012-09-18
CN100573871C (zh) 2009-12-23
US20120319235A1 (en) 2012-12-20
US20100013046A1 (en) 2010-01-21
US20070026664A1 (en) 2007-02-01
CN1893076A (zh) 2007-01-10
US8686538B2 (en) 2014-04-01
JP2007019188A (ja) 2007-01-25
US7419901B2 (en) 2008-09-02
US7602040B2 (en) 2009-10-13

Similar Documents

Publication Publication Date Title
TW200707646A (en) Semiconductor device and a method of manufacturing the same
TWI256677B (en) Barrier material and process for Cu interconnect
TW200739811A (en) Interconnect structure of an integrated circuit, damascene structure, semiconductor structure and fabrication methods thereof
TW200731537A (en) Semiconductor device and manufacturing method thereof
SG135198A1 (en) Oxygen doped sic for cu barrier and etch stop layer in dual damascene fabrication
WO2006098820A3 (en) Method of forming a semiconductor device having a diffusion barrier stack and structure thereof
TW200507108A (en) Semiconductor device and method for manufacturing the same
TW200735273A (en) Semiconductor structures and methods for forming the same
TW430867B (en) Plasma treatment to enhance inorganic dielectric adhesion to copper
TWI257125B (en) A method for preventing metal line bridging in a semiconductor device
TW200629470A (en) Dual damascene wiring and method
TW200518263A (en) Method for fabricating copper interconnects
WO2007084907A8 (en) Method for fabricating last level copper-to-c4 connection with interfacial cap structure
TW200710966A (en) Semiconductor device and method for production thereof
TW200723448A (en) Interconnect structure and fabrication method thereof and semiconductor device
SG127856A1 (en) Interconnects with harmonized stress and methods for fabricating the same
TW200735275A (en) Semiconductor device and manufacturing method of semiconductor device
TW200636522A (en) Method for determining antenna ratio
TW200601414A (en) Semiconductor device and manufacturing method thereof
WO2011043869A3 (en) Semiconductor device having a copper plug
JP2008205119A5 (zh)
TW200715525A (en) Semiconductor integrated circuit device and method for manufacturing same
EP1883957A4 (en) CREATING A LOCAL AND GLOBAL WIRING FOR A SEMICONDUCTOR PRODUCT
TW200707644A (en) Semiconductor device
TW200729402A (en) An interconnect structure and methods for fabricating the same

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees