TW200525734A - Semiconductor device and method of manufacturing the same - Google Patents

Semiconductor device and method of manufacturing the same Download PDF

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Publication number
TW200525734A
TW200525734A TW093138569A TW93138569A TW200525734A TW 200525734 A TW200525734 A TW 200525734A TW 093138569 A TW093138569 A TW 093138569A TW 93138569 A TW93138569 A TW 93138569A TW 200525734 A TW200525734 A TW 200525734A
Authority
TW
Taiwan
Prior art keywords
region
layer
semiconductor device
isolation insulating
insulating films
Prior art date
Application number
TW093138569A
Other languages
English (en)
Chinese (zh)
Inventor
Toshiaki Iwamatsu
Takashi Ipposhi
Original Assignee
Renesas Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Tech Corp filed Critical Renesas Tech Corp
Publication of TW200525734A publication Critical patent/TW200525734A/zh

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76283Lateral isolation by refilling of trenches with dielectric material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/20Inductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/40Resistors
    • H10D1/47Resistors having no potential barriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Thin Film Transistor (AREA)
TW093138569A 2003-12-19 2004-12-13 Semiconductor device and method of manufacturing the same TW200525734A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003422762A JP2005183686A (ja) 2003-12-19 2003-12-19 半導体装置およびその製造方法

Publications (1)

Publication Number Publication Date
TW200525734A true TW200525734A (en) 2005-08-01

Family

ID=34675327

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093138569A TW200525734A (en) 2003-12-19 2004-12-13 Semiconductor device and method of manufacturing the same

Country Status (6)

Country Link
US (4) US7173319B2 (enExample)
JP (1) JP2005183686A (enExample)
KR (1) KR20050062390A (enExample)
CN (1) CN1649160A (enExample)
DE (1) DE102004060170A1 (enExample)
TW (1) TW200525734A (enExample)

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JP2005183686A (ja) * 2003-12-19 2005-07-07 Renesas Technology Corp 半導体装置およびその製造方法
JP4479006B2 (ja) 2005-07-28 2010-06-09 セイコーエプソン株式会社 半導体装置の製造方法
US7790527B2 (en) * 2006-02-03 2010-09-07 International Business Machines Corporation High-voltage silicon-on-insulator transistors and methods of manufacturing the same
JP2007242660A (ja) * 2006-03-06 2007-09-20 Renesas Technology Corp 半導体装置
US20070232019A1 (en) * 2006-03-30 2007-10-04 Hynix Semiconductor Inc. Method for forming isolation structure in nonvolatile memory device
CN100514585C (zh) * 2006-04-12 2009-07-15 财团法人工业技术研究院 具有电感的晶片级构装结构及其构装方法
US8089130B2 (en) * 2006-06-20 2012-01-03 Agere Systems Inc. Semiconductor device and process for reducing damaging breakdown in gate dielectrics
KR100819558B1 (ko) * 2006-09-04 2008-04-07 삼성전자주식회사 반도체 저항소자들 및 그의 형성방법들
JP5137378B2 (ja) * 2006-10-20 2013-02-06 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
JP4614981B2 (ja) * 2007-03-22 2011-01-19 Jsr株式会社 化学機械研磨用水系分散体および半導体装置の化学機械研磨方法
JP4458129B2 (ja) * 2007-08-09 2010-04-28 ソニー株式会社 半導体装置およびその製造方法
US7679139B2 (en) * 2007-09-11 2010-03-16 Honeywell International Inc. Non-planar silicon-on-insulator device that includes an “area-efficient” body tie
JP5446388B2 (ja) * 2009-03-31 2014-03-19 サンケン電気株式会社 集積化半導体装置の製造方法
CN101859782B (zh) * 2010-04-30 2012-05-30 北京大学 抗总剂量辐照的soi器件及其制造方法
CN101859783B (zh) * 2010-04-30 2012-05-30 北京大学 一种抗总剂量辐照的soi器件及其制造方法
US8492868B2 (en) * 2010-08-02 2013-07-23 International Business Machines Corporation Method, apparatus, and design structure for silicon-on-insulator high-bandwidth circuitry with reduced charge layer
JP5616823B2 (ja) * 2011-03-08 2014-10-29 セイコーインスツル株式会社 半導体装置およびその製造方法
US8765607B2 (en) 2011-06-01 2014-07-01 Freescale Semiconductor, Inc. Active tiling placement for improved latch-up immunity
KR101896412B1 (ko) * 2011-08-01 2018-09-07 페어차일드코리아반도체 주식회사 폴리 실리콘 저항, 이를 포함하는 기준 전압 회로, 및 폴리 실리콘 저항 제조 방법
JP2012186491A (ja) * 2012-05-07 2012-09-27 Renesas Electronics Corp 半導体装置及びその製造方法
FR3012666A1 (enExample) 2013-10-31 2015-05-01 St Microelectronics Crolles 2
FR3012667A1 (enExample) 2013-10-31 2015-05-01 St Microelectronics Crolles 2
FR3012665A1 (enExample) * 2013-10-31 2015-05-01 St Microelectronics Crolles 2
US9929135B2 (en) 2016-03-07 2018-03-27 Micron Technology, Inc. Apparatuses and methods for semiconductor circuit layout
DE102018112866B4 (de) * 2018-05-29 2020-07-02 Infineon Technologies Ag Halbleitervorrichtung mit elektrischem Widerstand

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JPH09289324A (ja) 1996-04-23 1997-11-04 Matsushita Electric Works Ltd 半導体装置の製造方法
JP3161418B2 (ja) 1998-07-06 2001-04-25 日本電気株式会社 電界効果トランジスタの製造方法
JP4540146B2 (ja) * 1998-12-24 2010-09-08 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2001230315A (ja) * 2000-02-17 2001-08-24 Mitsubishi Electric Corp 半導体装置およびその製造方法
KR100543393B1 (ko) * 2000-03-09 2006-01-20 후지쯔 가부시끼가이샤 반도체 장치 및 그 제조 방법
US6358820B1 (en) * 2000-04-17 2002-03-19 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device
JP4776752B2 (ja) * 2000-04-19 2011-09-21 ルネサスエレクトロニクス株式会社 半導体装置
JP4969715B2 (ja) * 2000-06-06 2012-07-04 ルネサスエレクトロニクス株式会社 半導体装置
JP4776755B2 (ja) * 2000-06-08 2011-09-21 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP2002110908A (ja) 2000-09-28 2002-04-12 Toshiba Corp スパイラルインダクタおよびこれを備える半導体集積回路装置の製造方法
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JP4803898B2 (ja) * 2001-05-17 2011-10-26 ルネサスエレクトロニクス株式会社 半導体装置
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JP2005183686A (ja) * 2003-12-19 2005-07-07 Renesas Technology Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
CN1649160A (zh) 2005-08-03
KR20050062390A (ko) 2005-06-23
US20050133864A1 (en) 2005-06-23
US7453135B2 (en) 2008-11-18
US20070105329A1 (en) 2007-05-10
US20060270126A1 (en) 2006-11-30
US7173319B2 (en) 2007-02-06
JP2005183686A (ja) 2005-07-07
US20080042237A1 (en) 2008-02-21
DE102004060170A1 (de) 2005-07-28
US7352049B2 (en) 2008-04-01

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