SG97204A1 - Method of fabricating semiconductor side wall fin - Google Patents
Method of fabricating semiconductor side wall finInfo
- Publication number
- SG97204A1 SG97204A1 SG200106328A SG200106328A SG97204A1 SG 97204 A1 SG97204 A1 SG 97204A1 SG 200106328 A SG200106328 A SG 200106328A SG 200106328 A SG200106328 A SG 200106328A SG 97204 A1 SG97204 A1 SG 97204A1
- Authority
- SG
- Singapore
- Prior art keywords
- side wall
- fabricating semiconductor
- semiconductor side
- wall fin
- mosfet
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 239000012212 insulator Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66484—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with multiple gate, at least one gate being an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/78654—Monocrystalline silicon transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78684—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
- H01L29/78687—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys with a multilayer structure or superlattice structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/691,353 US7163864B1 (en) | 2000-10-18 | 2000-10-18 | Method of fabricating semiconductor side wall fin |
Publications (1)
Publication Number | Publication Date |
---|---|
SG97204A1 true SG97204A1 (en) | 2003-07-18 |
Family
ID=24776208
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG200106328A SG97204A1 (en) | 2000-10-18 | 2001-10-12 | Method of fabricating semiconductor side wall fin |
Country Status (9)
Country | Link |
---|---|
US (3) | US7163864B1 (de) |
EP (1) | EP1202335B1 (de) |
JP (1) | JP4071951B2 (de) |
KR (1) | KR100444095B1 (de) |
CN (1) | CN100530567C (de) |
AT (1) | ATE426246T1 (de) |
DE (1) | DE60138000D1 (de) |
SG (1) | SG97204A1 (de) |
TW (1) | TW526564B (de) |
Families Citing this family (104)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7358121B2 (en) | 2002-08-23 | 2008-04-15 | Intel Corporation | Tri-gate devices and methods of fabrication |
US6800910B2 (en) * | 2002-09-30 | 2004-10-05 | Advanced Micro Devices, Inc. | FinFET device incorporating strained silicon in the channel region |
JP4546021B2 (ja) * | 2002-10-02 | 2010-09-15 | ルネサスエレクトロニクス株式会社 | 絶縁ゲート型電界効果型トランジスタ及び半導体装置 |
KR100474850B1 (ko) * | 2002-11-15 | 2005-03-11 | 삼성전자주식회사 | 수직 채널을 가지는 비휘발성 sonos 메모리 및 그 제조방법 |
US6709982B1 (en) | 2002-11-26 | 2004-03-23 | Advanced Micro Devices, Inc. | Double spacer FinFET formation |
US6720619B1 (en) * | 2002-12-13 | 2004-04-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor-on-insulator chip incorporating partially-depleted, fully-depleted, and multiple-gate devices |
US6803631B2 (en) * | 2003-01-23 | 2004-10-12 | Advanced Micro Devices, Inc. | Strained channel finfet |
US6762483B1 (en) * | 2003-01-23 | 2004-07-13 | Advanced Micro Devices, Inc. | Narrow fin FinFET |
US7304336B2 (en) | 2003-02-13 | 2007-12-04 | Massachusetts Institute Of Technology | FinFET structure and method to make the same |
KR100483425B1 (ko) * | 2003-03-17 | 2005-04-14 | 삼성전자주식회사 | 반도체소자 및 그 제조 방법 |
US6762448B1 (en) * | 2003-04-03 | 2004-07-13 | Advanced Micro Devices, Inc. | FinFET device with multiple fin structures |
JP4632046B2 (ja) * | 2003-04-09 | 2011-02-16 | 日本電気株式会社 | 高移動度シリコンチャネルを有する縦型misfet半導体装置 |
US7074656B2 (en) * | 2003-04-29 | 2006-07-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Doping of semiconductor fin devices |
US6909186B2 (en) * | 2003-05-01 | 2005-06-21 | International Business Machines Corporation | High performance FET devices and methods therefor |
JP4105044B2 (ja) | 2003-06-13 | 2008-06-18 | 株式会社東芝 | 電界効果トランジスタ |
US6894326B2 (en) * | 2003-06-25 | 2005-05-17 | International Business Machines Corporation | High-density finFET integration scheme |
US7456476B2 (en) | 2003-06-27 | 2008-11-25 | Intel Corporation | Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication |
US6909151B2 (en) | 2003-06-27 | 2005-06-21 | Intel Corporation | Nonplanar device with stress incorporation layer and method of fabrication |
US6716686B1 (en) | 2003-07-08 | 2004-04-06 | Advanced Micro Devices, Inc. | Method for forming channels in a finfet device |
KR100973092B1 (ko) | 2003-07-21 | 2010-07-29 | 매그나칩 반도체 유한회사 | 실리콘 온 인슐레이터 웨이퍼를 이용한 수직구조의 모스커패시터의 제조방법 |
US7013447B2 (en) * | 2003-07-22 | 2006-03-14 | Freescale Semiconductor, Inc. | Method for converting a planar transistor design to a vertical double gate transistor design |
US7355253B2 (en) | 2003-08-22 | 2008-04-08 | International Business Machines Corporation | Strained-channel Fin field effect transistor (FET) with a uniform channel thickness and separate gates |
US6946377B2 (en) * | 2003-10-29 | 2005-09-20 | Texas Instruments Incorporated | Multiple-gate MOSFET device with lithography independent silicon body thickness and methods for fabricating the same |
US7029958B2 (en) | 2003-11-04 | 2006-04-18 | Advanced Micro Devices, Inc. | Self aligned damascene gate |
US7498225B1 (en) | 2003-12-04 | 2009-03-03 | Advanced Micro Devices, Inc. | Systems and methods for forming multiple fin structures using metal-induced-crystallization |
US7388258B2 (en) * | 2003-12-10 | 2008-06-17 | International Business Machines Corporation | Sectional field effect devices |
US7105390B2 (en) | 2003-12-30 | 2006-09-12 | Intel Corporation | Nonplanar transistors with metal gate electrodes |
US7268058B2 (en) | 2004-01-16 | 2007-09-11 | Intel Corporation | Tri-gate transistors and methods to fabricate same |
US7154118B2 (en) * | 2004-03-31 | 2006-12-26 | Intel Corporation | Bulk non-planar transistor having strained enhanced mobility and methods of fabrication |
US7115920B2 (en) * | 2004-04-12 | 2006-10-03 | International Business Machines Corporation | FinFET transistor and circuit |
US7042009B2 (en) | 2004-06-30 | 2006-05-09 | Intel Corporation | High mobility tri-gate devices and methods of fabrication |
US7348284B2 (en) | 2004-08-10 | 2008-03-25 | Intel Corporation | Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow |
KR100555573B1 (ko) | 2004-09-10 | 2006-03-03 | 삼성전자주식회사 | Seg막에 의해 확장된 접합영역을 갖는 반도체 소자 및그의 제조방법 |
US7422946B2 (en) | 2004-09-29 | 2008-09-09 | Intel Corporation | Independently accessed double-gate and tri-gate transistors in same process flow |
US7332439B2 (en) | 2004-09-29 | 2008-02-19 | Intel Corporation | Metal gate transistors with epitaxial source and drain regions |
US7361958B2 (en) | 2004-09-30 | 2008-04-22 | Intel Corporation | Nonplanar transistors with metal gate electrodes |
US20060086977A1 (en) | 2004-10-25 | 2006-04-27 | Uday Shah | Nonplanar device with thinned lower body portion and method of fabrication |
US7193279B2 (en) | 2005-01-18 | 2007-03-20 | Intel Corporation | Non-planar MOS structure with a strained channel region |
JP2008529295A (ja) * | 2005-01-28 | 2008-07-31 | エヌエックスピー ビー ヴィ | デュアルゲートfetを製造する方法 |
US7518196B2 (en) | 2005-02-23 | 2009-04-14 | Intel Corporation | Field effect transistor with narrow bandgap source and drain regions and method of fabrication |
US20060202266A1 (en) | 2005-03-14 | 2006-09-14 | Marko Radosavljevic | Field effect transistor with metal source/drain regions |
JP4987244B2 (ja) * | 2005-04-28 | 2012-07-25 | 株式会社東芝 | 半導体装置の製造方法 |
US9153645B2 (en) | 2005-05-17 | 2015-10-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication |
US8324660B2 (en) | 2005-05-17 | 2012-12-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication |
US7858481B2 (en) | 2005-06-15 | 2010-12-28 | Intel Corporation | Method for fabricating transistor with thinned channel |
US7547637B2 (en) | 2005-06-21 | 2009-06-16 | Intel Corporation | Methods for patterning a semiconductor film |
US7902598B2 (en) | 2005-06-24 | 2011-03-08 | Micron Technology, Inc. | Two-sided surround access transistor for a 4.5F2 DRAM cell |
US7279375B2 (en) | 2005-06-30 | 2007-10-09 | Intel Corporation | Block contact architectures for nanoscale channel transistors |
US7888721B2 (en) | 2005-07-06 | 2011-02-15 | Micron Technology, Inc. | Surround gate access transistors with grown ultra-thin bodies |
US7768051B2 (en) | 2005-07-25 | 2010-08-03 | Micron Technology, Inc. | DRAM including a vertical surround gate transistor |
US7402875B2 (en) | 2005-08-17 | 2008-07-22 | Intel Corporation | Lateral undercut of metal gate in SOI device |
US7339241B2 (en) * | 2005-08-31 | 2008-03-04 | Freescale Semiconductor, Inc. | FinFET structure with contacts |
US7479421B2 (en) | 2005-09-28 | 2009-01-20 | Intel Corporation | Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby |
US20070090416A1 (en) | 2005-09-28 | 2007-04-26 | Doyle Brian S | CMOS devices with a single work function gate electrode and method of fabrication |
US7485503B2 (en) | 2005-11-30 | 2009-02-03 | Intel Corporation | Dielectric interface for group III-V semiconductor device |
DE102006001680B3 (de) | 2006-01-12 | 2007-08-09 | Infineon Technologies Ag | Herstellungsverfahren für eine FinFET-Transistoranordnung und entsprechende FinFET-Transistoranordnung |
US7446001B2 (en) * | 2006-02-08 | 2008-11-04 | Freescale Semiconductors, Inc. | Method for forming a semiconductor-on-insulator (SOI) body-contacted device with a portion of drain region removed |
US7777250B2 (en) | 2006-03-24 | 2010-08-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Lattice-mismatched semiconductor structures and related methods for device fabrication |
US7670928B2 (en) | 2006-06-14 | 2010-03-02 | Intel Corporation | Ultra-thin oxide bonding for S1 to S1 dual orientation bonding |
US8143646B2 (en) | 2006-08-02 | 2012-03-27 | Intel Corporation | Stacking fault and twin blocking barrier for integrating III-V on Si |
EP1916717A3 (de) * | 2006-08-23 | 2010-12-22 | Imec | Verfahren zur Dotierung einer FIN-basierten Halbleitervorrichtung |
EP1892765A1 (de) * | 2006-08-23 | 2008-02-27 | INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM vzw (IMEC) | Verfahren zur Dotierung eines FIN-basierten Halbleiterbauelements |
EP2062290B1 (de) | 2006-09-07 | 2019-08-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Defektreduzierung durch kontrolle des aspektverhältnisses |
US7875958B2 (en) | 2006-09-27 | 2011-01-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures |
US8502263B2 (en) * | 2006-10-19 | 2013-08-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Light-emitter-based devices with lattice-mismatched semiconductor structures |
KR100827696B1 (ko) * | 2006-12-08 | 2008-05-07 | 삼성전자주식회사 | 액티브 영역의 변화 없이 사이즈 조절이 가능한 트랜지스터레이아웃 구조 및 트랜지스터 사이즈 조절 방법 |
CN101601138B (zh) * | 2007-01-22 | 2012-07-25 | 松下电器产业株式会社 | 半导体装置及其制造方法 |
US7838948B2 (en) * | 2007-01-30 | 2010-11-23 | Infineon Technologies Ag | Fin interconnects for multigate FET circuit blocks |
US7772048B2 (en) * | 2007-02-23 | 2010-08-10 | Freescale Semiconductor, Inc. | Forming semiconductor fins using a sacrificial fin |
US7825328B2 (en) * | 2007-04-09 | 2010-11-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Nitride-based multi-junction solar cell modules and methods for making the same |
US8237151B2 (en) | 2009-01-09 | 2012-08-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Diode-based devices and methods for making the same |
US8304805B2 (en) | 2009-01-09 | 2012-11-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor diodes fabricated by aspect ratio trapping with coalesced films |
WO2008124154A2 (en) | 2007-04-09 | 2008-10-16 | Amberwave Systems Corporation | Photovoltaics on silicon |
US7709390B2 (en) * | 2007-05-31 | 2010-05-04 | Micron Technology, Inc. | Methods of isolating array features during pitch doubling processes and semiconductor device structures having isolated array features |
US8329541B2 (en) | 2007-06-15 | 2012-12-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | InP-based transistor fabrication |
JP5011011B2 (ja) * | 2007-07-12 | 2012-08-29 | 株式会社東芝 | 半導体装置の製造方法 |
DE112008002387B4 (de) | 2007-09-07 | 2022-04-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Struktur einer Mehrfachübergangs-Solarzelle, Verfahren zur Bildung einer photonischenVorrichtung, Photovoltaische Mehrfachübergangs-Zelle und Photovoltaische Mehrfachübergangs-Zellenvorrichtung, |
US7960255B2 (en) * | 2007-09-26 | 2011-06-14 | Stmicroelectronics (Crolles 2) Sas | Process for forming a wire portion in an integrated electronic circuit |
JP2008160145A (ja) * | 2008-02-04 | 2008-07-10 | Renesas Technology Corp | 絶縁ゲート型電界効果型トランジスタ及び半導体装置 |
US8183667B2 (en) | 2008-06-03 | 2012-05-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Epitaxial growth of crystalline material |
US8362566B2 (en) | 2008-06-23 | 2013-01-29 | Intel Corporation | Stress in trigate devices using complimentary gate fill materials |
US8274097B2 (en) | 2008-07-01 | 2012-09-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Reduction of edge effects from aspect ratio trapping |
US8981427B2 (en) | 2008-07-15 | 2015-03-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Polishing of small composite semiconductor materials |
JP5416212B2 (ja) | 2008-09-19 | 2014-02-12 | 台湾積體電路製造股▲ふん▼有限公司 | エピタキシャル層の成長によるデバイス形成 |
US20100072515A1 (en) | 2008-09-19 | 2010-03-25 | Amberwave Systems Corporation | Fabrication and structures of crystalline material |
US8253211B2 (en) | 2008-09-24 | 2012-08-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor sensor structures with reduced dislocation defect densities |
CN102379046B (zh) * | 2009-04-02 | 2015-06-17 | 台湾积体电路制造股份有限公司 | 从晶体材料的非极性平面形成的器件及其制作方法 |
US7855105B1 (en) * | 2009-06-18 | 2010-12-21 | International Business Machines Corporation | Planar and non-planar CMOS devices with multiple tuned threshold voltages |
US8021949B2 (en) * | 2009-12-01 | 2011-09-20 | International Business Machines Corporation | Method and structure for forming finFETs with multiple doping regions on a same chip |
JP5714831B2 (ja) * | 2010-03-18 | 2015-05-07 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
US8338256B2 (en) | 2010-07-08 | 2012-12-25 | International Business Machines Corporation | Multi-gate transistor having sidewall contacts |
US8404560B2 (en) * | 2010-10-12 | 2013-03-26 | International Business Machines Corporation | Devices with gate-to-gate isolation structures and methods of manufacture |
US8455330B2 (en) | 2010-10-12 | 2013-06-04 | International Business Machines Corporation | Devices with gate-to-gate isolation structures and methods of manufacture |
US8298913B2 (en) * | 2010-10-12 | 2012-10-30 | International Business Machines Corporation | Devices with gate-to-gate isolation structures and methods of manufacture |
JP5713837B2 (ja) * | 2011-08-10 | 2015-05-07 | 株式会社東芝 | 半導体装置の製造方法 |
FR2995720B1 (fr) * | 2012-09-18 | 2014-10-24 | Commissariat Energie Atomique | Procede de realisation d'un dispositif a effet de champ a double grille a grilles independantes |
JP6033714B2 (ja) * | 2013-03-11 | 2016-11-30 | 株式会社日立製作所 | 半導体光素子およびその製造方法 |
US8895395B1 (en) | 2013-06-06 | 2014-11-25 | International Business Machines Corporation | Reduced resistance SiGe FinFET devices and method of forming same |
CN105321820B (zh) * | 2014-07-08 | 2018-09-14 | 台湾积体电路制造股份有限公司 | 通过opc修改布局设计以降低拐角圆化效应 |
KR102290793B1 (ko) | 2014-12-18 | 2021-08-19 | 삼성전자주식회사 | 반도체 장치, 반도체 장치의 패턴 형성 방법 및 반도체 장치의 제조 방법 |
US9704859B1 (en) | 2016-05-06 | 2017-07-11 | International Business Machines Corporation | Forming semiconductor fins with self-aligned patterning |
US10157745B2 (en) | 2016-06-29 | 2018-12-18 | International Business Machines Corporation | High aspect ratio gates |
US10276442B1 (en) | 2018-05-30 | 2019-04-30 | Globalfoundries Inc. | Wrap-around contacts formed with multiple silicide layers |
US20240105793A1 (en) * | 2022-09-26 | 2024-03-28 | Psemi Corporation | Transistors designed with reduced leakage |
Family Cites Families (46)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3876480A (en) | 1972-08-28 | 1975-04-08 | Motorola Inc | Method of manufacturing high speed, isolated integrated circuit |
US4716128A (en) | 1986-12-10 | 1987-12-29 | General Motors Corporation | Method of fabricating silicon-on-insulator like devices |
JPH0214578A (ja) * | 1988-07-01 | 1990-01-18 | Fujitsu Ltd | 半導体装置 |
US5346834A (en) | 1988-11-21 | 1994-09-13 | Hitachi, Ltd. | Method for manufacturing a semiconductor device and a semiconductor memory device |
FR2645345A1 (fr) * | 1989-03-31 | 1990-10-05 | Thomson Csf | Procede de modulation dirigee de la composition ou du dopage de semi-conducteurs, notamment pour la realisation de composants electroniques monolithiques de type planar, utilisation et produits correspondants |
US5049521A (en) | 1989-11-30 | 1991-09-17 | Silicon General, Inc. | Method for forming dielectrically isolated semiconductor devices with contact to the wafer substrate |
FR2666172B1 (fr) * | 1990-08-24 | 1997-05-16 | Thomson Csf | Transistor de puissance et procede de realisation. |
JP3202223B2 (ja) | 1990-11-27 | 2001-08-27 | 日本電気株式会社 | トランジスタの製造方法 |
EP0510667B1 (de) * | 1991-04-26 | 1996-09-11 | Canon Kabushiki Kaisha | Halbleitervorrichtung mit verbessertem isoliertem Gate-Transistor |
JPH05121321A (ja) * | 1991-10-25 | 1993-05-18 | Rohm Co Ltd | シリコンの結晶成長法 |
US5273921A (en) * | 1991-12-27 | 1993-12-28 | Purdue Research Foundation | Methods for fabricating a dual-gated semiconductor-on-insulator field effect transistor |
US5391506A (en) | 1992-01-31 | 1995-02-21 | Kawasaki Steel Corporation | Manufacturing method for semiconductor devices with source/drain formed in substrate projection. |
US5365097A (en) * | 1992-10-05 | 1994-11-15 | International Business Machines Corporation | Vertical epitaxial SOI transistor, memory cell and fabrication methods |
US5346934A (en) * | 1992-12-21 | 1994-09-13 | Chriss Henry T | Footwear additive made from recycled materials |
DE69432722T2 (de) * | 1993-07-29 | 2004-04-08 | Fuji Jukogyo K.K. | Fahrregelsignal-Fehlererkennungssystem und -Verfahren für automatische Getriebe |
US5593928A (en) | 1993-11-30 | 1997-01-14 | Lg Semicon Co., Ltd. | Method of making a semiconductor device having floating source and drain regions |
US5494837A (en) | 1994-09-27 | 1996-02-27 | Purdue Research Foundation | Method of forming semiconductor-on-insulator electronic devices by growing monocrystalline semiconducting regions from trench sidewalls |
DE4441901C2 (de) * | 1994-11-24 | 1998-07-02 | Siemens Ag | MOSFET auf SOI-Substrat und Verfahren zu dessen Herstellung |
US5581101A (en) | 1995-01-03 | 1996-12-03 | International Business Machines Corporation | FET and/or bipolar devices formed in thin vertical silicon on insulator (SOI) structures |
US5675164A (en) * | 1995-06-07 | 1997-10-07 | International Business Machines Corporation | High performance multi-mesa field effect transistor |
US5757038A (en) * | 1995-11-06 | 1998-05-26 | International Business Machines Corporation | Self-aligned dual gate MOSFET with an ultranarrow channel |
DE19548058C2 (de) * | 1995-12-21 | 1997-11-20 | Siemens Ag | Verfahren zur Herstellung eines MOS-Transistors |
US5698884A (en) * | 1996-02-07 | 1997-12-16 | Thunderbird Technologies, Inc. | Short channel fermi-threshold field effect transistors including drain field termination region and methods of fabricating same |
JPH09293793A (ja) * | 1996-04-26 | 1997-11-11 | Mitsubishi Electric Corp | 薄膜トランジスタを有する半導体装置およびその製造方法 |
US5773331A (en) | 1996-12-17 | 1998-06-30 | International Business Machines Corporation | Method for making single and double gate field effect transistors with sidewall source-drain contacts |
US6118161A (en) * | 1997-04-30 | 2000-09-12 | Texas Instruments Incorporated | Self-aligned trenched-channel lateral-current-flow transistor |
KR100281110B1 (ko) * | 1997-12-15 | 2001-03-02 | 김영환 | 반도체소자및그제조방법 |
KR100295636B1 (ko) * | 1997-12-17 | 2001-08-07 | 김영환 | 박막트랜지스터및그제조방법 |
US6177299B1 (en) * | 1998-01-15 | 2001-01-23 | International Business Machines Corporation | Transistor having substantially isolated body and method of making the same |
US6040605A (en) * | 1998-01-28 | 2000-03-21 | Hitachi, Ltd. | Semiconductor memory device |
US6013936A (en) * | 1998-08-06 | 2000-01-11 | International Business Machines Corporation | Double silicon-on-insulator device and method therefor |
DE19853268C2 (de) * | 1998-11-18 | 2002-04-11 | Infineon Technologies Ag | Feldeffektgesteuerter Transistor und Verfahren zu dessen Herstellung |
JP2000243854A (ja) * | 1999-02-22 | 2000-09-08 | Toshiba Corp | 半導体装置及びその製造方法 |
US6365465B1 (en) * | 1999-03-19 | 2002-04-02 | International Business Machines Corporation | Self-aligned double-gate MOSFET by selective epitaxy and silicon wafer bonding techniques |
US6479847B2 (en) * | 1999-05-07 | 2002-11-12 | International Business Machines Corporation | Method for complementary oxide transistor fabrication |
US6967140B2 (en) * | 2000-03-01 | 2005-11-22 | Intel Corporation | Quantum wire gate device and method of making same |
US6483156B1 (en) * | 2000-03-16 | 2002-11-19 | International Business Machines Corporation | Double planar gated SOI MOSFET structure |
US6563131B1 (en) * | 2000-06-02 | 2003-05-13 | International Business Machines Corporation | Method and structure of a dual/wrap-around gate field effect transistor |
US6441433B1 (en) * | 2001-04-02 | 2002-08-27 | Advanced Micro Devices, Inc. | Method of making a multi-thickness silicide SOI device |
US6458662B1 (en) * | 2001-04-04 | 2002-10-01 | Advanced Micro Devices, Inc. | Method of fabricating a semiconductor device having an asymmetrical dual-gate silicon-germanium (SiGe) channel MOSFET and a device thereby formed |
KR100431489B1 (ko) * | 2001-09-04 | 2004-05-12 | 한국과학기술원 | 플래쉬 메모리 소자 및 제조방법 |
US6800905B2 (en) * | 2001-12-14 | 2004-10-05 | International Business Machines Corporation | Implanted asymmetric doped polysilicon gate FinFET |
US6657252B2 (en) * | 2002-03-19 | 2003-12-02 | International Business Machines Corporation | FinFET CMOS with NVRAM capability |
US6833569B2 (en) * | 2002-12-23 | 2004-12-21 | International Business Machines Corporation | Self-aligned planar double-gate process by amorphization |
US7192876B2 (en) * | 2003-05-22 | 2007-03-20 | Freescale Semiconductor, Inc. | Transistor with independent gate structures |
US7355253B2 (en) * | 2003-08-22 | 2008-04-08 | International Business Machines Corporation | Strained-channel Fin field effect transistor (FET) with a uniform channel thickness and separate gates |
-
2000
- 2000-10-18 US US09/691,353 patent/US7163864B1/en not_active Expired - Lifetime
-
2001
- 2001-10-05 KR KR10-2001-0061318A patent/KR100444095B1/ko not_active IP Right Cessation
- 2001-10-12 SG SG200106328A patent/SG97204A1/en unknown
- 2001-10-15 EP EP01308767A patent/EP1202335B1/de not_active Expired - Lifetime
- 2001-10-15 AT AT01308767T patent/ATE426246T1/de not_active IP Right Cessation
- 2001-10-15 TW TW090125391A patent/TW526564B/zh not_active IP Right Cessation
- 2001-10-15 DE DE60138000T patent/DE60138000D1/de not_active Expired - Lifetime
- 2001-10-17 JP JP2001319845A patent/JP4071951B2/ja not_active Expired - Fee Related
- 2001-10-18 CN CNB011357991A patent/CN100530567C/zh not_active Expired - Fee Related
-
2004
- 2004-06-16 US US10/867,772 patent/US7265417B2/en not_active Expired - Fee Related
-
2006
- 2006-07-31 US US11/495,518 patent/US7361556B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN100530567C (zh) | 2009-08-19 |
ATE426246T1 (de) | 2009-04-15 |
EP1202335B1 (de) | 2009-03-18 |
EP1202335A2 (de) | 2002-05-02 |
CN1349249A (zh) | 2002-05-15 |
DE60138000D1 (de) | 2009-04-30 |
TW526564B (en) | 2003-04-01 |
US20050001216A1 (en) | 2005-01-06 |
JP4071951B2 (ja) | 2008-04-02 |
EP1202335A3 (de) | 2004-09-08 |
US7163864B1 (en) | 2007-01-16 |
KR20020031286A (ko) | 2002-05-01 |
JP2002198538A (ja) | 2002-07-12 |
US7265417B2 (en) | 2007-09-04 |
US7361556B2 (en) | 2008-04-22 |
US20070026617A1 (en) | 2007-02-01 |
KR100444095B1 (ko) | 2004-08-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SG97204A1 (en) | Method of fabricating semiconductor side wall fin | |
US6864520B2 (en) | Germanium field effect transistor and method of fabricating the same | |
US6803631B2 (en) | Strained channel finfet | |
US7141854B2 (en) | Double-gated silicon-on-insulator (SOI) transistors with corner rounding | |
Liu et al. | Ideal rectangular cross-section Si-Fin channel double-gate MOSFETs fabricated using orientation-dependent wet etching | |
US20060076625A1 (en) | Field effect transistors having a strained silicon channel and methods of fabricating same | |
US20060261406A1 (en) | Vertical integrated-gate CMOS device and its fabrication process | |
SG137692A1 (en) | Method for forming variable-k gate dielectric | |
WO2004038804A3 (en) | Semiconductor device having a u-shaped gate structure | |
WO2005067677A3 (en) | High performance strained silicon finfets device and method for forming same | |
SG135041A1 (en) | Method of fabricating t-shaped recessed polysilicon gate transistors | |
WO2003081687A3 (en) | Self-aligned nanotube field effect transistor and method of fabricating same | |
EP1227523A3 (de) | Hochspannungstransistor mit vergrabener Leitungsschicht und Herstellungsverfahren dafür | |
WO2004073044A3 (en) | Finfet device and method to make same | |
EP1028473A3 (de) | Mittels weniger Masken hergestelltes vertikales MOS-Bauelement mit Graben-Gateelektrode | |
AU2001291257A1 (en) | Multigate semiconductor device with vertical channel current and method of fabrication | |
US7923346B2 (en) | Field effect transistor structure with an insulating layer at the junction | |
EP1783836A3 (de) | L- und U-Gate-Vorrichtungen für SOI/SOS-Anwendungen | |
EP2093799A3 (de) | Integrierter Schaltkreis mit enggekoppeltem Hochspannungsausgang und "Offline" Transistorpaar | |
ATE534145T1 (de) | Halbleiterbauelement | |
WO2007036793A3 (en) | Power mosfets and methods of making same | |
WO1999054918A3 (en) | Manufacture of trench-gate semiconductor devices | |
WO2003036714A1 (fr) | Procede de fabrication de misfet longitudinal, misfet longitudinal, procede de fabrication de dispositif de stockage a semi-conducteur et dispositif de stockage a semi-conducteur | |
IT251498Y1 (it) | Dispositivo di apertura e chiusura per una porta scorrevola | |
AU2002357746A1 (en) | Method for forming trench mosfet device with low parasitic resistance |