SG139621A1 - Thermal treatment for bonding interface stabilization - Google Patents

Thermal treatment for bonding interface stabilization

Info

Publication number
SG139621A1
SG139621A1 SG200703822-7A SG2007038227A SG139621A1 SG 139621 A1 SG139621 A1 SG 139621A1 SG 2007038227 A SG2007038227 A SG 2007038227A SG 139621 A1 SG139621 A1 SG 139621A1
Authority
SG
Singapore
Prior art keywords
thermal treatment
bonding interface
interface stabilization
stabilization
bonding
Prior art date
Application number
SG200703822-7A
Other languages
English (en)
Inventor
Eric Neyret
Sebastien Kerdiles
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Publication of SG139621A1 publication Critical patent/SG139621A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/477Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Recrystallisation Techniques (AREA)
  • Formation Of Insulating Films (AREA)
  • Adhesives Or Adhesive Processes (AREA)
SG200703822-7A 2006-07-13 2007-05-28 Thermal treatment for bonding interface stabilization SG139621A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0606440A FR2903809B1 (fr) 2006-07-13 2006-07-13 Traitement thermique de stabilisation d'interface e collage.

Publications (1)

Publication Number Publication Date
SG139621A1 true SG139621A1 (en) 2008-02-29

Family

ID=37745927

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200703822-7A SG139621A1 (en) 2006-07-13 2007-05-28 Thermal treatment for bonding interface stabilization

Country Status (8)

Country Link
US (3) US8216916B2 (ko)
EP (2) EP1879225A1 (ko)
JP (1) JP2008021992A (ko)
KR (1) KR100890792B1 (ko)
CN (1) CN101106073B (ko)
FR (1) FR2903809B1 (ko)
SG (1) SG139621A1 (ko)
TW (1) TWI344206B (ko)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2895563B1 (fr) * 2005-12-22 2008-04-04 Soitec Silicon On Insulator Procede de simplification d'une sequence de finition et structure obtenue par le procede
FR2903809B1 (fr) * 2006-07-13 2008-10-17 Soitec Silicon On Insulator Traitement thermique de stabilisation d'interface e collage.
US9406574B1 (en) 2007-08-09 2016-08-02 Cypress Semiconductor Corporation Oxide formation in a plasma process
US8119538B1 (en) * 2007-08-09 2012-02-21 Cypress Semiconductor Corporation Oxide formation in a plasma process
EP2161741B1 (en) * 2008-09-03 2014-06-11 Soitec Method for fabricating a semiconductor on insulator substrate with reduced SECCO defect density
FR2938118B1 (fr) * 2008-10-30 2011-04-22 Soitec Silicon On Insulator Procede de fabrication d'un empilement de couches minces semi-conductrices
FR2938119B1 (fr) * 2008-10-30 2011-04-22 Soitec Silicon On Insulator Procede de detachement de couches semi-conductrices a basse temperature
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture
FR2989516B1 (fr) * 2012-04-11 2014-04-18 Soitec Silicon On Insulator Procede de fabrication d'une structure soi mettant en oeuvre deux rta
CN111312852B (zh) * 2019-11-26 2020-10-20 中国科学院上海微系统与信息技术研究所 氧化镓半导体结构、日盲光电探测器及制备方法

Family Cites Families (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3332137A (en) * 1964-09-28 1967-07-25 Rca Corp Method of isolating chips of a wafer of semiconductor material
US3355636A (en) * 1965-06-29 1967-11-28 Rca Corp High power, high frequency transistor
US3997381A (en) * 1975-01-10 1976-12-14 Intel Corporation Method of manufacture of an epitaxial semiconductor layer on an insulating substrate
FR2542500B1 (fr) * 1983-03-11 1986-08-29 Thomson Csf Procede de fabrication d'un dispositif semiconducteur du type comprenant au moins une couche de silicium deposee sur un substrat isolant
US4649627A (en) * 1984-06-28 1987-03-17 International Business Machines Corporation Method of fabricating silicon-on-insulator transistors with a shared element
US4794217A (en) * 1985-04-01 1988-12-27 Qing Hua University Induction system for rapid heat treatment of semiconductor wafers
US4601779A (en) * 1985-06-24 1986-07-22 International Business Machines Corporation Method of producing a thin silicon-on-insulator layer
US4704785A (en) * 1986-08-01 1987-11-10 Texas Instruments Incorporated Process for making a buried conductor by fusing two wafers
US4771016A (en) * 1987-04-24 1988-09-13 Harris Corporation Using a rapid thermal process for manufacturing a wafer bonded soi semiconductor
JPH0729911A (ja) 1993-07-07 1995-01-31 Toshiba Corp 半導体基板とその製造方法
JPH09260618A (ja) 1996-03-19 1997-10-03 Nippon Telegr & Teleph Corp <Ntt> Soi基板の製造方法
JP3325793B2 (ja) 1996-03-22 2002-09-17 三洋電機株式会社 非晶質半導体及びその製造方法並びに光起電力装置
US6159824A (en) * 1997-05-12 2000-12-12 Silicon Genesis Corporation Silicon-on-silicon wafer bonding process using a thin film blister-separation method
US6236454B1 (en) * 1997-12-15 2001-05-22 Applied Materials, Inc. Multiple beam scanner for an inspection system
FR2777115B1 (fr) * 1998-04-07 2001-07-13 Commissariat Energie Atomique Procede de traitement de substrats semi-conducteurs et structures obtenues par ce procede
JPH11307472A (ja) * 1998-04-23 1999-11-05 Shin Etsu Handotai Co Ltd 水素イオン剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ
JP3697106B2 (ja) 1998-05-15 2005-09-21 キヤノン株式会社 半導体基板の作製方法及び半導体薄膜の作製方法
EP1114454A2 (en) * 1998-09-02 2001-07-11 MEMC Electronic Materials, Inc. Silicon on insulator structure from low defect density single crystal silicon
JP2000124092A (ja) 1998-10-16 2000-04-28 Shin Etsu Handotai Co Ltd 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ
JP3951487B2 (ja) 1998-12-25 2007-08-01 信越半導体株式会社 Soi基板及びその製造方法
JP3911901B2 (ja) 1999-04-09 2007-05-09 信越半導体株式会社 Soiウエーハおよびsoiウエーハの製造方法
EP1158581B1 (en) * 1999-10-14 2016-04-27 Shin-Etsu Handotai Co., Ltd. Method for producing soi wafer
FR2827078B1 (fr) 2001-07-04 2005-02-04 Soitec Silicon On Insulator Procede de diminution de rugosite de surface
WO2003046993A1 (fr) 2001-11-29 2003-06-05 Shin-Etsu Handotai Co.,Ltd. Procede de production de plaquettes soi
JP4307825B2 (ja) 2002-08-28 2009-08-05 リンテック株式会社 半導体ウエハの保護構造、半導体ウエハの保護方法、これらに用いる積層保護シートおよび半導体ウエハの加工方法
US20040060899A1 (en) * 2002-10-01 2004-04-01 Applied Materials, Inc. Apparatuses and methods for treating a silicon film
JP4670224B2 (ja) * 2003-04-01 2011-04-13 株式会社Sumco シリコンウェーハの製造方法
JP2005005674A (ja) * 2003-05-21 2005-01-06 Canon Inc 基板製造方法及び基板処理装置
FR2855908B1 (fr) 2003-06-06 2005-08-26 Soitec Silicon On Insulator Procede d'obtention d'une structure comprenant au moins un substrat et une couche ultramince
WO2005022610A1 (ja) 2003-09-01 2005-03-10 Sumco Corporation 貼り合わせウェーハの製造方法
JPWO2005027217A1 (ja) * 2003-09-08 2007-11-08 株式会社Sumco Soiウェーハおよびその製造方法
EP1667208A4 (en) * 2003-09-08 2010-05-19 Sumco Corp PROCESS FOR PRODUCTION OF PLATELET LI
EP1542275A1 (en) * 2003-12-10 2005-06-15 S.O.I.TEC. Silicon on Insulator Technologies S.A. A method for improving the quality of a heterostructure
JP4730581B2 (ja) 2004-06-17 2011-07-20 信越半導体株式会社 貼り合わせウェーハの製造方法
JP2006013179A (ja) 2004-06-28 2006-01-12 Sumco Corp Soiウェーハの製造方法
JP2008526010A (ja) 2004-12-28 2008-07-17 エス. オー. アイ. テック シリコン オン インシュレーター テクノロジーズ 低いホール密度を有する薄層を得るための方法
JP4934966B2 (ja) * 2005-02-04 2012-05-23 株式会社Sumco Soi基板の製造方法
FR2895563B1 (fr) * 2005-12-22 2008-04-04 Soitec Silicon On Insulator Procede de simplification d'une sequence de finition et structure obtenue par le procede
FR2896619B1 (fr) * 2006-01-23 2008-05-23 Soitec Silicon On Insulator Procede de fabrication d'un substrat composite a proprietes electriques ameliorees
FR2903809B1 (fr) * 2006-07-13 2008-10-17 Soitec Silicon On Insulator Traitement thermique de stabilisation d'interface e collage.

Also Published As

Publication number Publication date
KR20080007094A (ko) 2008-01-17
US7863158B2 (en) 2011-01-04
US20080014718A1 (en) 2008-01-17
KR100890792B1 (ko) 2009-03-31
JP2008021992A (ja) 2008-01-31
EP1879225A1 (fr) 2008-01-16
TWI344206B (en) 2011-06-21
EP2256798A1 (fr) 2010-12-01
CN101106073B (zh) 2012-05-30
TW200805625A (en) 2008-01-16
FR2903809B1 (fr) 2008-10-17
US20080014713A1 (en) 2008-01-17
US8461018B2 (en) 2013-06-11
FR2903809A1 (fr) 2008-01-18
US20110233720A1 (en) 2011-09-29
CN101106073A (zh) 2008-01-16
US8216916B2 (en) 2012-07-10

Similar Documents

Publication Publication Date Title
SG139621A1 (en) Thermal treatment for bonding interface stabilization
HUS1800011I1 (hu) Kombinációs terápia szubsztituált oxazolidinonokkal
EP2123136A4 (en) IMPROVED PLASMA SOURCE
EP1993183A4 (en) STABILIZATION SYSTEM FOR POWER SUPPLY UNIT
GB0723631D0 (en) x-ray source
ZA200809529B (en) Melatonin agonist treatment
IL194756A0 (en) Antiseptic-containing silicone elastomers
GB0708423D0 (en) Power source apparatus
EP2243756A4 (en) WHITE CERAMIC
TWI368329B (en) Semiconductor decice
GB0614833D0 (en) Semiconductor laser
GB0608052D0 (en) Q-modulated semiconductor laser
IL210507A0 (en) Device for the thermal treatment of workpieces
GB2457671B (en) Revocation for direct anonymous attestation
HK1151233A1 (en) Novel patient subgroups for thrombolysis
GB0624439D0 (en) Technique for treatment of gall-and kidney-stones
PL2060088T3 (pl) Adaptacyjny wybór dla żądania źródła kontekstu
AU2008905218A0 (en) Silicon source
AU312984S (en) Headgear for patient interface
AU312983S (en) Headgear for patient interface
IN2009CN02380A (ko)
AU311606S (en) Sink
GB0622326D0 (en) V-coupled-cavity semiconductor laser
UA36194U (en) Use of quercetin as hepatoprotector
TWM292186U (en) Connector of power source