SG11201703288UA - Resin composition, semiconductor device manufacturing method and semiconductor device - Google Patents

Resin composition, semiconductor device manufacturing method and semiconductor device

Info

Publication number
SG11201703288UA
SG11201703288UA SG11201703288UA SG11201703288UA SG11201703288UA SG 11201703288U A SG11201703288U A SG 11201703288UA SG 11201703288U A SG11201703288U A SG 11201703288UA SG 11201703288U A SG11201703288U A SG 11201703288UA SG 11201703288U A SG11201703288U A SG 11201703288UA
Authority
SG
Singapore
Prior art keywords
semiconductor device
resin composition
device manufacturing
manufacturing
semiconductor
Prior art date
Application number
SG11201703288UA
Other languages
English (en)
Inventor
Jun Ishii
Goji Shiga
Chie Iino
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Publication of SG11201703288UA publication Critical patent/SG11201703288UA/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08K—Use of inorganic or non-macromolecular organic substances as compounding ingredients
    • C08K3/00—Use of inorganic substances as compounding ingredients
    • C08K3/34—Silicon-containing compounds
    • C08K3/36—Silica
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08J—WORKING-UP; GENERAL PROCESSES OF COMPOUNDING; AFTER-TREATMENT NOT COVERED BY SUBCLASSES C08B, C08C, C08F, C08G or C08H
    • C08J5/00—Manufacture of articles or shaped materials containing macromolecular substances
    • C08J5/18—Manufacture of films or sheets
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08K—Use of inorganic or non-macromolecular organic substances as compounding ingredients
    • C08K3/00—Use of inorganic substances as compounding ingredients
    • C08K3/01—Use of inorganic substances as compounding ingredients characterized by their specific function
    • C08K3/013—Fillers, pigments or reinforcing additives
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L101/00—Compositions of unspecified macromolecular compounds
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H01L2224/16146—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a via connection in the semiconductor or solid-state body
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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    • H01L2224/81005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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    • H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
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    • H01L2924/18162—Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect
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    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Organic Chemistry (AREA)
  • Polymers & Plastics (AREA)
  • Medicinal Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Manufacturing & Machinery (AREA)
  • Materials Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Compositions Of Macromolecular Compounds (AREA)
SG11201703288UA 2014-11-07 2015-10-15 Resin composition, semiconductor device manufacturing method and semiconductor device SG11201703288UA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014226745A JP5976073B2 (ja) 2014-11-07 2014-11-07 半導体装置の製造方法
PCT/JP2015/079172 WO2016072236A1 (ja) 2014-11-07 2015-10-15 樹脂組成物、半導体装置の製造方法及び半導体装置

Publications (1)

Publication Number Publication Date
SG11201703288UA true SG11201703288UA (en) 2017-05-30

Family

ID=55908963

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201703288UA SG11201703288UA (en) 2014-11-07 2015-10-15 Resin composition, semiconductor device manufacturing method and semiconductor device

Country Status (6)

Country Link
JP (1) JP5976073B2 (ja)
KR (1) KR20170081195A (ja)
CN (1) CN107109069A (ja)
SG (1) SG11201703288UA (ja)
TW (1) TW201621000A (ja)
WO (1) WO2016072236A1 (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018104649A (ja) * 2016-12-28 2018-07-05 日東電工株式会社 樹脂シート
KR102216172B1 (ko) 2017-07-14 2021-02-15 주식회사 엘지화학 절연층 제조방법 및 반도체 패키지 제조방법
KR102073295B1 (ko) * 2018-06-22 2020-02-04 삼성전자주식회사 반도체 패키지
CN113196470A (zh) 2018-12-18 2021-07-30 罗姆股份有限公司 半导体装置及半导体装置的制造方法
CN115699295A (zh) 2020-05-26 2023-02-03 罗姆股份有限公司 半导体装置以及半导体装置的制造方法

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2816882B2 (ja) * 1990-01-11 1998-10-27 東洋ゴム工業株式会社 電子部品封止用成形体
JP3378374B2 (ja) * 1993-09-14 2003-02-17 株式会社東芝 樹脂封止型半導体装置の製造方法、樹脂封止型半導体装置及び封止用樹脂シート
JP3768920B2 (ja) * 2001-06-07 2006-04-19 松下電器産業株式会社 回路基板の製造方法およびその回路基板を用いた電力変換モジュール
JP5035580B2 (ja) * 2001-06-28 2012-09-26 ナガセケムテックス株式会社 弾性表面波デバイスおよびその製法
JP4417122B2 (ja) * 2004-01-21 2010-02-17 日東電工株式会社 シート状半導体封止用樹脂組成物
JP4730652B2 (ja) * 2004-06-02 2011-07-20 ナガセケムテックス株式会社 電子部品の製造方法
JP5354841B2 (ja) * 2005-12-28 2013-11-27 日東電工株式会社 半導体装置及びその製造方法
JP4872587B2 (ja) * 2006-10-12 2012-02-08 日立化成工業株式会社 封止フィルム、及びこれを用いた半導体装置
JP5310103B2 (ja) * 2009-03-03 2013-10-09 日本電気株式会社 半導体装置及びその製造方法
JP5180162B2 (ja) * 2009-08-05 2013-04-10 日東電工株式会社 電子部品封止用シート状エポキシ樹脂組成物およびそれにより得られた電子部品装置集合体ならびに電子部品装置
JP5354200B2 (ja) * 2009-11-19 2013-11-27 株式会社村田製作所 電子部品内蔵樹脂基板および電子回路モジュール
JP5042297B2 (ja) * 2009-12-10 2012-10-03 日東電工株式会社 半導体装置の製造方法
JP2011148959A (ja) * 2010-01-25 2011-08-04 Kyocera Chemical Corp 半導体封止用樹脂シートおよび樹脂封止型半導体装置
JP2013007028A (ja) * 2011-05-20 2013-01-10 Nitto Denko Corp 封止用シートおよび電子部品装置
JP2013004823A (ja) * 2011-06-20 2013-01-07 Panasonic Corp 半導体装置の製造方法
JP6044137B2 (ja) * 2011-07-08 2016-12-14 日立化成株式会社 コンプレッション成形用半導体封止樹脂材料及び半導体装置
JP6051630B2 (ja) * 2011-07-13 2016-12-27 味の素株式会社 半導体パッケージ
JP2013147589A (ja) * 2012-01-20 2013-08-01 Nitto Denko Corp 電子部品封止用樹脂組成物シートおよびそれを用いた電子部品装置の製法
JP6171280B2 (ja) * 2012-07-31 2017-08-02 味の素株式会社 半導体装置の製造方法
JP6228734B2 (ja) * 2013-02-14 2017-11-08 日東電工株式会社 電子部品封止用樹脂シート、樹脂封止型半導体装置、及び、樹脂封止型半導体装置の製造方法
JP2014179593A (ja) * 2013-02-15 2014-09-25 Nitto Denko Corp 半導体素子用封止シート、半導体装置及び半導体装置の製造方法
JP6456027B2 (ja) * 2013-03-27 2019-01-23 日東電工株式会社 封止シート、封止シートの製造方法及び電子部品パッケージの製造方法
JP5735029B2 (ja) * 2013-03-28 2015-06-17 日東電工株式会社 電子デバイス封止用樹脂シート及び電子デバイスパッケージの製造方法
JP5793160B2 (ja) * 2013-03-28 2015-10-14 日東電工株式会社 電子デバイス封止用樹脂シート及び電子デバイスパッケージの製造方法
JP2014210909A (ja) * 2013-04-02 2014-11-13 日東電工株式会社 半導体装置の製造方法
JP2014203971A (ja) * 2013-04-04 2014-10-27 日東電工株式会社 アンダーフィルフィルム、封止シート、半導体装置の製造方法及び半導体装置
JP2014201703A (ja) * 2013-04-08 2014-10-27 日東電工株式会社 セパレータ付き樹脂シート、電子部品装置の製造方法及び電子部品装置
JP2014204040A (ja) * 2013-04-08 2014-10-27 日東電工株式会社 電子部品装置の製造方法

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