SG10201909185PA - Memory device including charge pump circuit - Google Patents
Memory device including charge pump circuitInfo
- Publication number
- SG10201909185PA SG10201909185PA SG10201909185PA SG10201909185PA SG10201909185PA SG 10201909185P A SG10201909185P A SG 10201909185PA SG 10201909185P A SG10201909185P A SG 10201909185PA SG 10201909185P A SG10201909185P A SG 10201909185PA SG 10201909185P A SG10201909185P A SG 10201909185PA
- Authority
- SG
- Singapore
- Prior art keywords
- memory device
- device including
- charge pump
- pump circuit
- including charge
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5671—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge trapping in an insulator
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/32—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/12005—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising voltage or current generators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
- G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
- H02M3/073—Charge pumps of the Schenkel-type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2254—Calibration
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
- H02M3/073—Charge pumps of the Schenkel-type
- H02M3/077—Charge pumps of the Schenkel-type with parallel connected charge pump stages
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Dc-Dc Converters (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020180119304A KR102545174B1 (ko) | 2018-10-05 | 2018-10-05 | 차지 펌프 회로를 포함하는 메모리 장치 |
Publications (1)
Publication Number | Publication Date |
---|---|
SG10201909185PA true SG10201909185PA (en) | 2020-05-28 |
Family
ID=70051246
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG10201909185PA SG10201909185PA (en) | 2018-10-05 | 2019-10-01 | Memory device including charge pump circuit |
Country Status (4)
Country | Link |
---|---|
US (1) | US10867639B2 (ko) |
KR (1) | KR102545174B1 (ko) |
CN (1) | CN111009267A (ko) |
SG (1) | SG10201909185PA (ko) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102609558B1 (ko) * | 2018-12-07 | 2023-12-04 | 삼성전자주식회사 | 전압 발생기 및 이의 동작 방법 |
KR20220049653A (ko) * | 2020-10-14 | 2022-04-22 | 삼성전자주식회사 | 비휘발성 메모리 장치 |
US11908528B2 (en) * | 2020-11-20 | 2024-02-20 | Stmicroelectronics International N.V. | Selectively configurable charge pump |
EP4033661B1 (en) * | 2020-11-25 | 2024-01-24 | Changxin Memory Technologies, Inc. | Control circuit and delay circuit |
KR20220118174A (ko) * | 2021-02-18 | 2022-08-25 | 에스케이하이닉스 주식회사 | 충전펌프회로와 그 동작방법 및 충전펌프회로를 포함하는 반도체 장치 |
CN113409849A (zh) * | 2021-05-21 | 2021-09-17 | 芯天下技术股份有限公司 | 一种降低编程功耗的方法、装置、存储介质和终端 |
IT202200006488A1 (it) * | 2022-04-01 | 2023-10-01 | St Microelectronics Srl | Dispositivo regolatore di tensione, corrispondenti procedimento e sistema di archiviazione dati |
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EP1310959B1 (en) * | 2001-11-09 | 2008-06-18 | STMicroelectronics S.r.l. | Low power charge pump circuit |
ITMI20022268A1 (it) | 2002-10-25 | 2004-04-26 | Atmel Corp | Circuito pompa di cariche variabile con carico dinamico |
KR100572323B1 (ko) * | 2003-12-11 | 2006-04-19 | 삼성전자주식회사 | 멀티레벨 고전압 발생장치 |
KR100645055B1 (ko) * | 2004-10-28 | 2006-11-10 | 삼성전자주식회사 | 플래시 메모리 장치 및 그것의 프로그램 방법 |
KR100673170B1 (ko) * | 2005-03-10 | 2007-01-22 | 주식회사 하이닉스반도체 | 향상된 소거 기능을 가지는 플래쉬 메모리 장치 및 그 소거동작 제어 방법 |
KR100700147B1 (ko) * | 2005-12-13 | 2007-03-28 | 삼성전자주식회사 | 반도체 메모리 장치의 서브 워드라인 구동회로 및 서브워드라인 구동 방법 |
US8279704B2 (en) * | 2006-07-31 | 2012-10-02 | Sandisk 3D Llc | Decoder circuitry providing forward and reverse modes of memory array operation and method for biasing same |
JP2008193766A (ja) * | 2007-02-01 | 2008-08-21 | Spansion Llc | 電圧発生回路及びその制御方法 |
US7760569B2 (en) * | 2007-04-05 | 2010-07-20 | Qimonda Ag | Semiconductor memory device with temperature control |
KR100918299B1 (ko) * | 2007-04-25 | 2009-09-18 | 삼성전자주식회사 | 배드 블록 정보를 저장하지 않는 행 디코더를 갖는 플래시메모리 장치 및 그것의 제어 방법 |
US7724603B2 (en) * | 2007-08-03 | 2010-05-25 | Freescale Semiconductor, Inc. | Method and circuit for preventing high voltage memory disturb |
US8072256B2 (en) * | 2007-09-14 | 2011-12-06 | Mosaid Technologies Incorporated | Dynamic random access memory and boosted voltage producer therefor |
US7760010B2 (en) * | 2007-10-30 | 2010-07-20 | International Business Machines Corporation | Switched-capacitor charge pumps |
US7701784B2 (en) * | 2007-11-02 | 2010-04-20 | Kabushiki Kaisha Toshiba | Semiconductor memory device which includes memory cell having charge accumulation layer and control gate |
US7956673B2 (en) | 2008-08-11 | 2011-06-07 | Micron Technology, Inc. | Variable stage charge pump and method for providing boosted output voltage |
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KR101605381B1 (ko) * | 2009-09-28 | 2016-03-23 | 삼성전자주식회사 | 비휘발성 메모리 장치, 이를 구비하는 비휘발성 메모리 시스템 |
US20110133820A1 (en) | 2009-12-09 | 2011-06-09 | Feng Pan | Multi-Stage Charge Pump with Variable Number of Boosting Stages |
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KR102242565B1 (ko) * | 2017-06-08 | 2021-04-20 | 삼성전자주식회사 | 소거 상태 정보를 기초로 메모리 장치를 제어하는 메모리 컨트롤러 및 이의 동작 방법 |
TWI702611B (zh) * | 2018-12-06 | 2020-08-21 | 旺宏電子股份有限公司 | 記憶體電路 |
US11011239B2 (en) * | 2018-12-27 | 2021-05-18 | Kioxia Corporation | Semiconductor memory |
KR20200092749A (ko) * | 2019-01-25 | 2020-08-04 | 삼성전자주식회사 | 충전 회로 및 플래시 드라이버를 포함하는 집적 회로와 그 동작 방법 |
-
2018
- 2018-10-05 KR KR1020180119304A patent/KR102545174B1/ko active IP Right Grant
-
2019
- 2019-07-03 US US16/502,736 patent/US10867639B2/en active Active
- 2019-09-02 CN CN201910822645.6A patent/CN111009267A/zh active Pending
- 2019-10-01 SG SG10201909185PA patent/SG10201909185PA/en unknown
Also Published As
Publication number | Publication date |
---|---|
US20200111513A1 (en) | 2020-04-09 |
CN111009267A (zh) | 2020-04-14 |
KR102545174B1 (ko) | 2023-06-19 |
US10867639B2 (en) | 2020-12-15 |
KR20200039403A (ko) | 2020-04-16 |
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