SE9502715D0 - Universal sender device - Google Patents

Universal sender device

Info

Publication number
SE9502715D0
SE9502715D0 SE9502715A SE9502715A SE9502715D0 SE 9502715 D0 SE9502715 D0 SE 9502715D0 SE 9502715 A SE9502715 A SE 9502715A SE 9502715 A SE9502715 A SE 9502715A SE 9502715 D0 SE9502715 D0 SE 9502715D0
Authority
SE
Sweden
Prior art keywords
mos transistor
pair
transmitter device
channel
universal transmitter
Prior art date
Application number
SE9502715A
Other languages
English (en)
Other versions
SE9502715L (sv
SE504636C2 (sv
Inventor
Mats Hedberg
Original Assignee
Ellemtel Utvecklings Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ellemtel Utvecklings Ab filed Critical Ellemtel Utvecklings Ab
Priority to SE9502715A priority Critical patent/SE504636C2/sv
Publication of SE9502715D0 publication Critical patent/SE9502715D0/sv
Priority to DE19601386A priority patent/DE19601386C2/de
Priority to JP9507521A priority patent/JPH11510338A/ja
Priority to CN96196951A priority patent/CN1099162C/zh
Priority to AU65389/96A priority patent/AU717718B2/en
Priority to MX9800634A priority patent/MX9800634A/es
Priority to CA002227890A priority patent/CA2227890A1/en
Priority to BR9609956A priority patent/BR9609956A/pt
Priority to KR10-1998-0700547A priority patent/KR100386929B1/ko
Priority to PCT/SE1996/000965 priority patent/WO1997005701A2/en
Priority to EP96925233A priority patent/EP0840954A2/en
Priority to KR10-1998-0705490A priority patent/KR100406246B1/ko
Publication of SE9502715L publication Critical patent/SE9502715L/sv
Publication of SE504636C2 publication Critical patent/SE504636C2/sv
Priority to US09/015,549 priority patent/US5994921A/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/028Arrangements specific to the transmitter end
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/04Modifications for accelerating switching
    • H03K17/041Modifications for accelerating switching without feedback from the output circuit to the control circuit
    • H03K17/0416Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the output circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008Arrangements for reducing power consumption
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/017581Coupling arrangements; Interface arrangements programmable
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018557Coupling arrangements; Impedance matching circuits
    • H03K19/018571Coupling arrangements; Impedance matching circuits of complementary type, e.g. CMOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/0272Arrangements for coupling to multiple lines, e.g. for differential transmission
SE9502715A 1995-07-27 1995-07-27 Universell sändaranordning SE504636C2 (sv)

Priority Applications (13)

Application Number Priority Date Filing Date Title
SE9502715A SE504636C2 (sv) 1995-07-27 1995-07-27 Universell sändaranordning
DE19601386A DE19601386C2 (de) 1995-07-27 1996-01-16 Ausgangspufferschaltkreis
EP96925233A EP0840954A2 (en) 1995-07-27 1996-07-24 Universal sender device
CA002227890A CA2227890A1 (en) 1995-07-27 1996-07-24 Universal sender device
CN96196951A CN1099162C (zh) 1995-07-27 1996-07-24 通用的发送器装置
AU65389/96A AU717718B2 (en) 1995-07-27 1996-07-24 Universal sender device
MX9800634A MX9800634A (es) 1995-07-27 1996-07-24 Dispositivo emisor universal.
JP9507521A JPH11510338A (ja) 1995-07-27 1996-07-24 ユニバーサル送信器デバイス
BR9609956A BR9609956A (pt) 1995-07-27 1996-07-24 Dispositivo emissor
KR10-1998-0700547A KR100386929B1 (ko) 1995-07-27 1996-07-24 일반적인송신기장치
PCT/SE1996/000965 WO1997005701A2 (en) 1995-07-27 1996-07-24 Universal sender device
KR10-1998-0705490A KR100406246B1 (ko) 1995-07-27 1996-12-23 출력버퍼회로
US09/015,549 US5994921A (en) 1995-07-27 1998-01-29 Universal sender device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9502715A SE504636C2 (sv) 1995-07-27 1995-07-27 Universell sändaranordning

Publications (3)

Publication Number Publication Date
SE9502715D0 true SE9502715D0 (sv) 1995-07-27
SE9502715L SE9502715L (sv) 1997-01-28
SE504636C2 SE504636C2 (sv) 1997-03-24

Family

ID=20399084

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9502715A SE504636C2 (sv) 1995-07-27 1995-07-27 Universell sändaranordning

Country Status (12)

Country Link
US (1) US5994921A (sv)
EP (1) EP0840954A2 (sv)
JP (1) JPH11510338A (sv)
KR (2) KR100386929B1 (sv)
CN (1) CN1099162C (sv)
AU (1) AU717718B2 (sv)
BR (1) BR9609956A (sv)
CA (1) CA2227890A1 (sv)
DE (1) DE19601386C2 (sv)
MX (1) MX9800634A (sv)
SE (1) SE504636C2 (sv)
WO (1) WO1997005701A2 (sv)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000503493A (ja) * 1996-01-16 2000-03-21 テレフオンアクチーボラゲツト エル エム エリクソン(パブル) 出力バッファ回路
US6175952B1 (en) * 1997-05-27 2001-01-16 Altera Corporation Technique of fabricating integrated circuits having interfaces compatible with different operating voltage conditions
DE19803796B4 (de) 1998-01-30 2006-10-26 Telefonaktiebolaget Lm Ericsson (Publ) Ausgangspuffer zum Ansteuern einer symmetrischen Übertragungsleitung
US7196556B1 (en) * 1998-07-02 2007-03-27 Altera Corporation Programmable logic integrated circuit devices with low voltage differential signaling capabilities
US6130548A (en) * 1999-07-09 2000-10-10 Motorola Inc. Signal converting receiver having constant hysteresis, and method therefor
US6600338B1 (en) * 2001-05-04 2003-07-29 Rambus, Inc. Apparatus and method for level-shifting input receiver circuit from high external voltage to low internal supply voltage
US6566911B1 (en) * 2001-05-18 2003-05-20 Pixelworks, Inc. Multiple-mode CMOS I/O cell
US6529050B1 (en) * 2001-08-20 2003-03-04 National Semiconductor Corporation High-speed clock buffer that has a substantially reduced crowbar current
JP4721578B2 (ja) * 2001-09-07 2011-07-13 ルネサスエレクトロニクス株式会社 ドライバ回路
US7702293B2 (en) 2001-11-02 2010-04-20 Nokia Corporation Multi-mode I/O circuitry supporting low interference signaling schemes for high speed digital interfaces
DE10155526C2 (de) 2001-11-12 2003-09-04 Infineon Technologies Ag LVDS-Treiber für kleine Versorungsspannungen
US7362146B2 (en) * 2005-07-25 2008-04-22 Steven Mark Macaluso Large supply range differential line driver
US20070206642A1 (en) * 2005-11-10 2007-09-06 X-Emi, Inc. Bidirectional active signal management in cables and other interconnects
US8653853B1 (en) * 2006-12-31 2014-02-18 Altera Corporation Differential interfaces for power domain crossings
JP5971113B2 (ja) 2012-12-26 2016-08-17 富士通株式会社 差動信号スキュー調整方法および送信回路
US8791743B1 (en) * 2013-02-18 2014-07-29 Apple Inc. Balanced level shifter with wide operation range
TWI610314B (zh) * 2014-03-10 2018-01-01 Toshiba Memory Corp 半導體積體電路裝置
KR102143197B1 (ko) 2020-03-11 2020-08-11 (주)에프엠코퍼레이션 리프트 기능을 갖는 자동차용 쇼링장치

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4408135A (en) * 1979-12-26 1983-10-04 Tokyo Shibaura Denki Kabushiki Kaisha Multi-level signal generating circuit
JPS5942690A (ja) * 1982-09-03 1984-03-09 Toshiba Corp 半導体記憶装置
US4527081A (en) * 1983-02-11 1985-07-02 The United States Of America As Represented By The Scretary Of The Army Overshoot predriven semi-asynchronous driver
JPS61294931A (ja) * 1985-06-21 1986-12-25 Mitsubishi Electric Corp 半導体装置およびデ−タ伝送路
US5179293A (en) * 1988-11-28 1993-01-12 Analog Devices, Inc. Bipolar output stage switching circuit
JP2902016B2 (ja) * 1989-11-21 1999-06-07 株式会社日立製作所 信号伝送方法および回路
US5263049A (en) * 1990-02-15 1993-11-16 Advanced Micro Devices Inc. Method and apparatus for CMOS differential drive having a rapid turn off
JPH0435224A (ja) * 1990-05-28 1992-02-06 Nec Corp 半導体装置
JP2943542B2 (ja) * 1992-11-25 1999-08-30 株式会社デンソー 差動型データ伝送装置
JPH06188718A (ja) * 1992-12-15 1994-07-08 Mitsubishi Electric Corp 半導体集積回路装置
US5319259A (en) * 1992-12-22 1994-06-07 National Semiconductor Corp. Low voltage input and output circuits with overvoltage protection
SE515490C2 (sv) * 1993-12-03 2001-08-13 Ericsson Telefon Ab L M Signaleringssystem
JPH07249975A (ja) * 1994-03-10 1995-09-26 Fujitsu Ltd 状態遷移時間制御型差動出力回路
SE503568C2 (sv) * 1994-03-23 1996-07-08 Ericsson Telefon Ab L M Signalmottagande och signalbehandlande enhet
FI945346A (sv) * 1994-11-14 1996-05-15 Finland Telecom Oy Förfarande och system för uppbärning av samtalskostnader
JPH08251010A (ja) * 1995-03-10 1996-09-27 Mitsubishi Electric Corp 半導体装置
DE19510947C1 (de) * 1995-03-25 1996-11-28 Hella Kg Hueck & Co Schaltungsanordnung zum Betrieb in verschiedenen Betriebsspannungsbereichen
US5585744A (en) * 1995-10-13 1996-12-17 Cirrus Logic, Inc. Circuits systems and methods for reducing power loss during transfer of data across a conductive line

Also Published As

Publication number Publication date
DE19601386C2 (de) 1998-01-29
SE9502715L (sv) 1997-01-28
CA2227890A1 (en) 1997-02-13
KR100406246B1 (ko) 2004-04-03
KR19990035886A (ko) 1999-05-25
SE504636C2 (sv) 1997-03-24
CN1099162C (zh) 2003-01-15
WO1997005701A3 (en) 1997-04-17
AU717718B2 (en) 2000-03-30
US5994921A (en) 1999-11-30
AU6538996A (en) 1997-02-26
WO1997005701A2 (en) 1997-02-13
EP0840954A2 (en) 1998-05-13
JPH11510338A (ja) 1999-09-07
CN1196142A (zh) 1998-10-14
KR19990077343A (ko) 1999-10-25
DE19601386A1 (de) 1997-01-30
BR9609956A (pt) 1999-02-02
KR100386929B1 (ko) 2003-08-25
MX9800634A (es) 1998-04-30

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