SE8603126D0 - Cmos-integrerad krets och metod att tillverka en sadan - Google Patents

Cmos-integrerad krets och metod att tillverka en sadan

Info

Publication number
SE8603126D0
SE8603126D0 SE8603126A SE8603126A SE8603126D0 SE 8603126 D0 SE8603126 D0 SE 8603126D0 SE 8603126 A SE8603126 A SE 8603126A SE 8603126 A SE8603126 A SE 8603126A SE 8603126 D0 SE8603126 D0 SE 8603126D0
Authority
SE
Sweden
Prior art keywords
trench
depth
suit
manufacturing
integrated circuit
Prior art date
Application number
SE8603126A
Other languages
English (en)
Other versions
SE8603126L (sv
Inventor
S T Hsu
D W Flatley
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of SE8603126D0 publication Critical patent/SE8603126D0/sv
Publication of SE8603126L publication Critical patent/SE8603126L/sv

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823878—Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0928—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising both N- and P- wells in the substrate, e.g. twin-tub

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
SE8603126A 1985-08-05 1986-07-15 Cmos-integrerad krets och metod att tillverka en sadan SE8603126L (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US76244185A 1985-08-05 1985-08-05

Publications (2)

Publication Number Publication Date
SE8603126D0 true SE8603126D0 (sv) 1986-07-15
SE8603126L SE8603126L (sv) 1987-02-06

Family

ID=25065055

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8603126A SE8603126L (sv) 1985-08-05 1986-07-15 Cmos-integrerad krets och metod att tillverka en sadan

Country Status (4)

Country Link
JP (1) JPS6338251A (sv)
KR (1) KR870002656A (sv)
DE (1) DE3625742C2 (sv)
SE (1) SE8603126L (sv)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940003218B1 (ko) * 1988-03-24 1994-04-16 세이꼬 엡슨 가부시끼가이샤 반도체 장치 및 그 제조방법
US5206535A (en) * 1988-03-24 1993-04-27 Seiko Epson Corporation Semiconductor device structure
US4954459A (en) * 1988-05-12 1990-09-04 Advanced Micro Devices, Inc. Method of planarization of topologies in integrated circuit structures
JP2579211B2 (ja) * 1989-01-18 1997-02-05 三菱電機株式会社 半導体装置の製造方法
JPH0574927A (ja) * 1991-09-13 1993-03-26 Nec Corp 半導体装置の製造方法
DE69232648T2 (de) * 1991-11-29 2003-02-06 Sony Corp Verfahren zur Herstellung einer Grabenisolation mittels eines Polierschritts und Herstellungsverfahren für eine Halbleitervorrichtung
JP2621765B2 (ja) * 1992-07-30 1997-06-18 日本電気株式会社 Ｃｍｏｓ半導体装置の素子分離構造の製造方法
DE59402986D1 (de) * 1993-07-27 1997-07-10 Siemens Ag Verfahren zur Herstellung eines Halbleiterschichtaufbaus mit planarisierter Oberfläche und dessen Verwendung bei der Herstellung eines Bipolartransistors sowie eines DRAM
KR950034673A (ko) * 1994-04-20 1995-12-28 윌리엄 이. 힐러 로우-케이 유전체를 사용하는 트랜지스터 분리 방법 및 장치
US5683945A (en) * 1996-05-16 1997-11-04 Siemens Aktiengesellschaft Uniform trench fill recess by means of isotropic etching
JP2000012687A (ja) 1998-06-23 2000-01-14 Mitsubishi Electric Corp 半導体装置及びその製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5986263A (ja) * 1982-11-09 1984-05-18 Nec Corp 半導体装置の製造方法
KR850700087A (ko) * 1983-10-11 1985-10-21 아메리칸 텔리폰 앤드 텔레그라프 캄파니 반도체 집적회로
JPS61501736A (ja) * 1984-03-29 1986-08-14 ヒユ−ズ・エアクラフト・カンパニ− Ｖｌｓｉ用ラッチ・アップ抵抗性ｃｍｏｓ構造

Also Published As

Publication number Publication date
JPS6338251A (ja) 1988-02-18
DE3625742A1 (de) 1987-05-27
KR870002656A (ko) 1987-04-06
DE3625742C2 (de) 1995-06-29
SE8603126L (sv) 1987-02-06

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