MXPA02002649A - Metodo para construir una estructura electronica que tiene un termopar de indio y una estructura electronica que tiene un termopar de indio. - Google Patents

Metodo para construir una estructura electronica que tiene un termopar de indio y una estructura electronica que tiene un termopar de indio.

Info

Publication number
MXPA02002649A
MXPA02002649A MXPA02002649A MXPA02002649A MXPA02002649A MX PA02002649 A MXPA02002649 A MX PA02002649A MX PA02002649 A MXPA02002649 A MX PA02002649A MX PA02002649 A MXPA02002649 A MX PA02002649A MX PA02002649 A MXPA02002649 A MX PA02002649A
Authority
MX
Mexico
Prior art keywords
substance
alloy
sheet
flake
lid
Prior art date
Application number
MXPA02002649A
Other languages
English (en)
Spanish (es)
Inventor
Terrance J Dishongh
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of MXPA02002649A publication Critical patent/MXPA02002649A/es

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3736—Metallic materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
MXPA02002649A 1999-09-13 2000-08-29 Metodo para construir una estructura electronica que tiene un termopar de indio y una estructura electronica que tiene un termopar de indio. MXPA02002649A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/394,860 US6461891B1 (en) 1999-09-13 1999-09-13 Method of constructing an electronic assembly having an indium thermal couple and an electronic assembly having an indium thermal couple
PCT/US2000/023778 WO2001020673A1 (en) 1999-09-13 2000-08-29 A method of constructing an electronic assembly having an indium thermal couple and an electronic assembly having an indium thermal couple

Publications (1)

Publication Number Publication Date
MXPA02002649A true MXPA02002649A (es) 2003-01-28

Family

ID=23560692

Family Applications (1)

Application Number Title Priority Date Filing Date
MXPA02002649A MXPA02002649A (es) 1999-09-13 2000-08-29 Metodo para construir una estructura electronica que tiene un termopar de indio y una estructura electronica que tiene un termopar de indio.

Country Status (8)

Country Link
US (2) US6461891B1 (enExample)
JP (1) JP5030352B2 (enExample)
KR (1) KR20020035870A (enExample)
CN (1) CN1319158C (enExample)
AU (1) AU7088900A (enExample)
MX (1) MXPA02002649A (enExample)
MY (1) MY122678A (enExample)
WO (1) WO2001020673A1 (enExample)

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US7436058B2 (en) * 2002-05-09 2008-10-14 Intel Corporation Reactive solder material
US20070164424A1 (en) * 2003-04-02 2007-07-19 Nancy Dean Thermal interconnect and interface systems, methods of production and uses thereof
DE10335111B4 (de) * 2003-07-31 2006-12-28 Infineon Technologies Ag Montageverfahren für ein Halbleiterbauteil
US7132746B2 (en) * 2003-08-18 2006-11-07 Delphi Technologies, Inc. Electronic assembly with solder-bonded heat sink
JP4411123B2 (ja) * 2004-03-31 2010-02-10 新光電気工業株式会社 放熱板の製造方法
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JP5211457B2 (ja) * 2006-09-19 2013-06-12 富士通セミコンダクター株式会社 半導体装置及びその製造方法
US7633151B2 (en) * 2007-03-16 2009-12-15 Advanced Micro Devices, Inc. Integrated circuit package lid with a wetting film
US7834442B2 (en) * 2007-12-12 2010-11-16 International Business Machines Corporation Electronic package method and structure with cure-melt hierarchy
JP5153316B2 (ja) * 2007-12-21 2013-02-27 新光電気工業株式会社 半導体パッケージ用放熱板およびそのめっき方法
US8378480B2 (en) * 2010-03-04 2013-02-19 Taiwan Semiconductor Manufacturing Company, Ltd. Dummy wafers in 3DIC package assemblies

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Also Published As

Publication number Publication date
US20020151110A1 (en) 2002-10-17
AU7088900A (en) 2001-04-17
KR20020035870A (ko) 2002-05-15
US20020020912A1 (en) 2002-02-21
JP2003509865A (ja) 2003-03-11
MY122678A (en) 2006-04-29
US6461891B1 (en) 2002-10-08
CN1319158C (zh) 2007-05-30
CN1373903A (zh) 2002-10-09
JP5030352B2 (ja) 2012-09-19
US6882043B2 (en) 2005-04-19
WO2001020673A1 (en) 2001-03-22

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