KR970023759A - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

Info

Publication number
KR970023759A
KR970023759A KR1019960030596A KR19960030596A KR970023759A KR 970023759 A KR970023759 A KR 970023759A KR 1019960030596 A KR1019960030596 A KR 1019960030596A KR 19960030596 A KR19960030596 A KR 19960030596A KR 970023759 A KR970023759 A KR 970023759A
Authority
KR
South Korea
Prior art keywords
semiconductor device
oxide film
silicon oxide
atom
metal
Prior art date
Application number
KR1019960030596A
Other languages
English (en)
Other versions
KR100259314B1 (ko
Inventor
마사즈미 마츄우라
Original Assignee
키타오카 타카시
미쓰비시 덴키 가부시끼 가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 키타오카 타카시, 미쓰비시 덴키 가부시끼 가이샤 filed Critical 키타오카 타카시
Publication of KR970023759A publication Critical patent/KR970023759A/ko
Application granted granted Critical
Publication of KR100259314B1 publication Critical patent/KR100259314B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02131Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604Deposition from a gas or vapour
    • H01L21/31608Deposition of SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

막 수축이 감소하고. 막 스트레스가 저감되도록 개량된 층간절연막을 갖는 반도체 장치를 제공하기 위해, 기판(1)상에 금속배선(2a, 2b)가 형성되어 있다. 금속배선(2a, 2b)를 덮도록, 또한 금속배선(2a)와 금속배선(2b) 사이의 틈을 매립하도록, 기판(1)상에 실리콘산화막(4)이 마련되어 있다. 실리콘산화막(4)의 화학구조식은 Si-F결합을 포함하고 있다.

Description

반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
도1-3은 본 발명의 실시예 1에 관한 반도체장치의 제조방법의 순서의 제1-3의 공정 각각에 있어서의 반도체장치의 단면도.

Claims (12)

  1. 기판(1), 상기 기판(1)상에 형성된 제1의 금속배선(2a)과 제2의 금속배선(2b), 상기 기판(1)상에 형성되어 상기 제1 및 제2의 금속배선(2a, 2b)을 덮고, 또한 상기 제1의 금속배선(2a)와 상기 제2의 금속배선(2b)의 틈 사이를 매립하는, 실리콘산화막(4)을 포함하고, 상기 실리콘산화막(4)의 화학구조식은 Si-F결합을 포함하는 반도체장치.
  2. 제1항에 있어서, 상기 실리콘산화막(4)의 화학구조식은 산소원자로 서로 연결된 제1의 실리콘원자와 제2의 실리콘원자를 갖는 단위를 갖고, 상기 제1의 실리콘원자에는 또, 2개의 산소원자가 결합되어 있고, 상기 제2의 실리콘 원자에는 1∼3개의 불소원자가 결합되어 있는 반도체장치.
  3. 제1항에 있어서, 상기 제1 및 제2의 금속배선(2a, 2b)상에 놓여있는 상기 실리콘산화막(4)의 두께를 a라 하고, 상기 기판(1)상에 놓여있고 또한 상기 제1의 금속배선(2a)과 상기 제2의 금속배선(2b) 사이에 놓여 있는 상기 실리콘산화막(4) 두께를 b라 할때, 부등식 a<b이 성립하는 반도체장치.
  4. 제1항에 있어서, 상기 실리콘산화막(4)중에는 붕소원자 또는 인원자가 포함되어 있는 반도체장치.
  5. 제4항에 있어서, 상기 붕소원자 또는 인원자는 5몰%∼10몰% 포함되어 있는 반도체장치.
  6. 제1항에 있어서, 상기 제1및 제2의 금속배선(2a, 2b)을 피복하는 플라즈마 산화막을 더 포함하는 반도체장치.
  7. 금속배선(2a, 2b)가 그 위에 형성된 기판(1)을 준비하는 공정, 불소원자가 결합한 실리콘원자를 갖는 원료가 스와 과산화수소와의 혼합가스를 사용하는 화학기상성장법에 의해 상기 금속배선(2a 2b)을 덮도록, 상기 기판(1)상에 실리콘산화막(4)을 형성하는 공정을 포함하는 반도체장치의 제조방법.
  8. 제7항에 있어서, 상기 원료가스로서, 디플루오르실란을 사용하는 반도체장치의 제조방법.
  9. 제7항에 있어서, 상기 원료가스로서, 트리플루오르실란 또는 모노플루오르실란을 사용하는 반도체장치의 제조방법.
  10. 제7항에 있어서, 상기 원료가스로서, 플루오르알콕시실란을 사용하는반도체장치의 제조방법.
  11. 제7항에 있어서, 상기 실리콘산화막(4)은 -10℃∼100℃의 온도에서 형성되는 반도체장치의 제조방법.
  12. 제7항에 있어서, 상기 실리콘산화막(4)은 200mTorr∼600Torr의 압력하에서 형성되는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960030596A 1995-10-23 1996-07-26 반도체장치의 제조방법 KR100259314B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7274010A JPH09116011A (ja) 1995-10-23 1995-10-23 半導体装置およびその製造方法
JP95-274010 1995-10-23

Publications (2)

Publication Number Publication Date
KR970023759A true KR970023759A (ko) 1997-05-30
KR100259314B1 KR100259314B1 (ko) 2000-06-15

Family

ID=17535705

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960030596A KR100259314B1 (ko) 1995-10-23 1996-07-26 반도체장치의 제조방법

Country Status (5)

Country Link
US (1) US5703404A (ko)
JP (1) JPH09116011A (ko)
KR (1) KR100259314B1 (ko)
DE (1) DE19612450A1 (ko)
TW (1) TW316325B (ko)

Families Citing this family (55)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0951035A (ja) * 1995-08-07 1997-02-18 Mitsubishi Electric Corp 層間絶縁膜の形成方法
JP3522917B2 (ja) * 1995-10-03 2004-04-26 株式会社東芝 半導体装置の製造方法および半導体製造装置
JP2917897B2 (ja) * 1996-03-29 1999-07-12 日本電気株式会社 半導体装置の製造方法
US6239579B1 (en) * 1996-07-05 2001-05-29 Estco Battery Management Inc. Device for managing battery packs by selectively monitoring and assessing the operative capacity of the battery modules in the pack
EP0820095A3 (en) * 1996-07-19 1999-01-27 Sony Corporation Method of forming an interlayer film
JP2962272B2 (ja) * 1997-04-18 1999-10-12 日本電気株式会社 半導体装置の製造方法
US5985770A (en) * 1997-08-21 1999-11-16 Micron Technology, Inc. Method of depositing silicon oxides
JPH1187340A (ja) * 1997-09-05 1999-03-30 Mitsubishi Electric Corp 半導体装置及びその製造方法
US5908672A (en) * 1997-10-15 1999-06-01 Applied Materials, Inc. Method and apparatus for depositing a planarized passivation layer
US6054379A (en) * 1998-02-11 2000-04-25 Applied Materials, Inc. Method of depositing a low k dielectric with organo silane
US6303523B2 (en) 1998-02-11 2001-10-16 Applied Materials, Inc. Plasma processes for depositing low dielectric constant films
US6593247B1 (en) 1998-02-11 2003-07-15 Applied Materials, Inc. Method of depositing low k films using an oxidizing plasma
US6340435B1 (en) 1998-02-11 2002-01-22 Applied Materials, Inc. Integrated low K dielectrics and etch stops
US6287990B1 (en) 1998-02-11 2001-09-11 Applied Materials, Inc. CVD plasma assisted low dielectric constant films
US6627532B1 (en) 1998-02-11 2003-09-30 Applied Materials, Inc. Method of decreasing the K value in SiOC layer deposited by chemical vapor deposition
US6660656B2 (en) 1998-02-11 2003-12-09 Applied Materials Inc. Plasma processes for depositing low dielectric constant films
US6413583B1 (en) 1998-02-11 2002-07-02 Applied Materials, Inc. Formation of a liquid-like silica layer by reaction of an organosilicon compound and a hydroxyl forming compound
JP3132557B2 (ja) * 1998-04-03 2001-02-05 日本電気株式会社 半導体装置の製造方法
US6667553B2 (en) 1998-05-29 2003-12-23 Dow Corning Corporation H:SiOC coated substrates
US6159871A (en) 1998-05-29 2000-12-12 Dow Corning Corporation Method for producing hydrogenated silicon oxycarbide films having low dielectric constant
JP2000077402A (ja) * 1998-09-02 2000-03-14 Tokyo Electron Ltd プラズマ処理方法および半導体装置
US6727190B2 (en) 1998-09-03 2004-04-27 Micron Technology, Inc. Method of forming fluorine doped boron-phosphorous silicate glass (F-BPSG) insulating materials
US5994778A (en) 1998-09-18 1999-11-30 Advanced Micro Devices, Inc. Surface treatment of low-k SiOF to prevent metal interaction
US6800571B2 (en) 1998-09-29 2004-10-05 Applied Materials Inc. CVD plasma assisted low dielectric constant films
US6171945B1 (en) 1998-10-22 2001-01-09 Applied Materials, Inc. CVD nanoporous silica low dielectric constant films
US6444593B1 (en) 1998-12-02 2002-09-03 Advanced Micro Devices, Inc. Surface treatment of low-K SiOF to prevent metal interaction
US6166427A (en) * 1999-01-15 2000-12-26 Advanced Micro Devices, Inc. Integration of low-K SiOF as inter-layer dielectric for AL-gapfill application
KR100308213B1 (ko) * 1999-02-12 2001-09-26 윤종용 반도체 장치를 위한 저유전 층간 절연막의 제조 방법
US6593077B2 (en) 1999-03-22 2003-07-15 Special Materials Research And Technology, Inc. Method of making thin films dielectrics using a process for room temperature wet chemical growth of SiO based oxides on a substrate
US6080683A (en) * 1999-03-22 2000-06-27 Special Materials Research And Technology, Inc. Room temperature wet chemical growth process of SiO based oxides on silicon
JP2000286262A (ja) * 1999-03-30 2000-10-13 Mitsubishi Electric Corp 半導体装置及びその製造方法
US6399489B1 (en) 1999-11-01 2002-06-04 Applied Materials, Inc. Barrier layer deposition using HDP-CVD
KR100531467B1 (ko) * 1999-11-05 2005-11-28 주식회사 하이닉스반도체 반도체 소자의 층간절연막 형성 방법
EP1123991A3 (en) * 2000-02-08 2002-11-13 Asm Japan K.K. Low dielectric constant materials and processes
US6458718B1 (en) 2000-04-28 2002-10-01 Asm Japan K.K. Fluorine-containing materials and processes
US6531398B1 (en) 2000-10-30 2003-03-11 Applied Materials, Inc. Method of depositing organosillicate layers
US6753258B1 (en) 2000-11-03 2004-06-22 Applied Materials Inc. Integration scheme for dual damascene structure
US6905981B1 (en) 2000-11-24 2005-06-14 Asm Japan K.K. Low-k dielectric materials and processes
US6709721B2 (en) 2001-03-28 2004-03-23 Applied Materials Inc. Purge heater design and process development for the improvement of low k film properties
US7074489B2 (en) 2001-05-23 2006-07-11 Air Products And Chemicals, Inc. Low dielectric constant material and method of processing by CVD
US6716770B2 (en) 2001-05-23 2004-04-06 Air Products And Chemicals, Inc. Low dielectric constant material and method of processing by CVD
US6486082B1 (en) * 2001-06-18 2002-11-26 Applied Materials, Inc. CVD plasma assisted lower dielectric constant sicoh film
US6613697B1 (en) 2001-06-26 2003-09-02 Special Materials Research And Technology, Inc. Low metallic impurity SiO based thin film dielectrics on semiconductor substrates using a room temperature wet chemical growth process, method and applications thereof
US6926926B2 (en) * 2001-09-10 2005-08-09 Applied Materials, Inc. Silicon carbide deposited by high density plasma chemical-vapor deposition with bias
US6936309B2 (en) * 2002-04-02 2005-08-30 Applied Materials, Inc. Hardness improvement of silicon carboxy films
US20030211244A1 (en) * 2002-04-11 2003-11-13 Applied Materials, Inc. Reacting an organosilicon compound with an oxidizing gas to form an ultra low k dielectric
US20030194495A1 (en) * 2002-04-11 2003-10-16 Applied Materials, Inc. Crosslink cyclo-siloxane compound with linear bridging group to form ultra low k dielectric
US6815373B2 (en) * 2002-04-16 2004-11-09 Applied Materials Inc. Use of cyclic siloxanes for hardness improvement of low k dielectric films
US6927178B2 (en) 2002-07-11 2005-08-09 Applied Materials, Inc. Nitrogen-free dielectric anti-reflective coating and hardmask
US7105460B2 (en) 2002-07-11 2006-09-12 Applied Materials Nitrogen-free dielectric anti-reflective coating and hardmask
US6897163B2 (en) * 2003-01-31 2005-05-24 Applied Materials, Inc. Method for depositing a low dielectric constant film
US7288205B2 (en) 2004-07-09 2007-10-30 Applied Materials, Inc. Hermetic low dielectric constant layer for barrier applications
JP2008244254A (ja) * 2007-03-28 2008-10-09 Fujitsu Microelectronics Ltd 半導体装置とその製造方法、及び分割露光用マスク
JP4413947B2 (ja) * 2007-06-21 2010-02-10 株式会社東芝 半導体装置の製造方法
JP6256953B2 (ja) * 2012-03-26 2018-01-10 シルコテック コーポレーション コーティングされた物品及び化学蒸着方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03175635A (ja) * 1989-12-04 1991-07-30 Nec Corp 半導体装置の多層配線構造体
JP2697315B2 (ja) * 1991-01-23 1998-01-14 日本電気株式会社 フッ素含有シリコン酸化膜の形成方法
JPH05226480A (ja) * 1991-12-04 1993-09-03 Nec Corp 半導体装置の製造方法
JP3688726B2 (ja) * 1992-07-17 2005-08-31 株式会社東芝 半導体装置の製造方法
KR0131439B1 (ko) * 1992-11-24 1998-04-14 나카무라 타메아키 반도체장치 및 그 제조방법
JP2917783B2 (ja) * 1993-12-24 1999-07-12 日本電気株式会社 半導体装置及びその製造方法

Also Published As

Publication number Publication date
DE19612450A1 (de) 1997-04-24
KR100259314B1 (ko) 2000-06-15
TW316325B (ko) 1997-09-21
US5703404A (en) 1997-12-30
JPH09116011A (ja) 1997-05-02

Similar Documents

Publication Publication Date Title
KR970023759A (ko) 반도체장치 및 그 제조방법
US5459105A (en) Method of manufacturing a semiconductor device having multilayer insulating films
KR100206630B1 (ko) 반도체장치의 제조방법
US6963125B2 (en) Electronic device packaging
TW343375B (en) Low dielectric constant silicon dioxide sandwich layer
WO2003019650A1 (fr) Dispositif a semiconducteur et son procede de production
KR960026365A (ko) 실리콘질화막의 제조방법
JPH0729897A (ja) 半導体装置の製造方法
KR960012327A (ko) 반도체 디바이스 및 그 제조 방법
KR910016049A (ko) 반도체 웨이퍼의 스텝된 표면위에 공극이 없는 산화층을 형성시키기 위한 2단계 방법
ITTO940818A1 (it) Fetta di materiale semiconduttore per la fabbricazione di dispositivi integrati e procedimento per la sua fabbricazione.
KR970018129A (ko) 반도체장치 및 그 제조방법
KR960002653A (ko) 반도체 디바이스의 제조 방법 및 제조 장치
KR910007090A (ko) 반도체 웨이퍼상의 붕소인 규산염 유리 복합물층과 그 형성 방법
US6077791A (en) Method of forming passivation layers using deuterium containing reaction gases
JPS5643742A (en) Manufacture of semiconductor
JPS62156822A (ja) 絶縁薄膜とその形成方法及び形成装置
TW377469B (en) Process of forming metal films and multi-layer structure
JPH05166802A (ja) 半導体装置
JP3877472B2 (ja) 層間絶縁膜の形成方法
JPH08167650A (ja) 絶縁膜構造およびその製造方法
JPS6179233A (ja) 半導体装置
JP2018152506A (ja) 半導体装置および半導体装置の製造方法
JPH08148562A (ja) 半導体装置及びその製造方法
JPH0950995A (ja) シリコン系酸化物および半導体装置の層間絶縁膜

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
AMND Amendment
E902 Notification of reason for refusal
AMND Amendment
E601 Decision to refuse application
J201 Request for trial against refusal decision
AMND Amendment
B701 Decision to grant
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20050309

Year of fee payment: 6

LAPS Lapse due to unpaid annual fee