KR970018493A - 반도체 장치의 커패시터 제작방법 - Google Patents

반도체 장치의 커패시터 제작방법 Download PDF

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KR970018493A
KR970018493A KR1019950028572A KR19950028572A KR970018493A KR 970018493 A KR970018493 A KR 970018493A KR 1019950028572 A KR1019950028572 A KR 1019950028572A KR 19950028572 A KR19950028572 A KR 19950028572A KR 970018493 A KR970018493 A KR 970018493A
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annealing
film
oxygen
capacitor
sio
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KR1019950028572A
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KR0183732B1 (ko
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박인성
김의송
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김광호
삼성전자 주식회사
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Priority to KR1019950028572A priority Critical patent/KR0183732B1/ko
Priority to JP8223983A priority patent/JPH09121035A/ja
Priority to TW085110643A priority patent/TW366553B/zh
Priority to US08/707,298 priority patent/US5837593A/en
Publication of KR970018493A publication Critical patent/KR970018493A/ko
Priority to US09/152,764 priority patent/US6118146A/en
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Publication of KR0183732B1 publication Critical patent/KR0183732B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02183—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing tantalum, e.g. Ta2O5
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02345—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light
    • H01L21/02348—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light treatment by exposure to UV light
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02277—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition the reactions being activated by other means than plasma or thermal, e.g. photo-CVD
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Formation Of Insulating Films (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)

Abstract

Ta2 O5의 고유전막을 갖는 반도체 장치의 커패시터에 있어서, Ta2 O5막 중착 후 Ta2 O5막내의 산소 결핍(Oxygen Vacancy)으로 인한 누설전류 차단을 위해 UV-O3어닐링과 고온 Dry-O2어닐링을 실시한다. 고유전체인 Ta2O3(오산화이탄탈륨)의 사용으로 기존의 이산화실리콘과 실리콘나이트라이드의 복합막인 ONO(SiO2/Si3/SiO2), NO(Si3N4/SiO2)보다 커패시터 용량은 증대되었으나 누설전류측면에서는 크게 뒤떨어지는 결과가 발생하였다. 이것은 Ta2O5내의 산소 결핍(Oxygen Vacancy)이 누설전류를 크게하는 한 요인이 됨으로, Ta2O5막 증착과 UV-O3어닐링을 각각 2회 이상 실시한 후 고온 DEY-O2어닐링을 실시함으로써 산소를 보충한다. 따라서 누설전류가 감소되어 신뢰성 있는 커패시터를 제작 할 수 있다.

Description

반도체 장치의 커패시터 제작방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2A도 내지 제2E도는 본 발명에 의한 반도체 장치의 커패시터제작방법을 설명하기 위해 도시한 단면도들이다.

Claims (7)

  1. 하부전극, Ta2O5막, 상부전극을 가진 반도체 장치의 커패시터에 있어서, 상기 Ta2O5막 증착 후 상기 Ta2O5막내의 산소 결핍(Oxygen Vacancy)으로 인한 누설전류 차단을 위해 Ta2O5막 증착후UV-O3어닐링을 실시하는 제1단계; 상기 1단계를 1회 이상 실시하는 제2단계; 및 상기 결과물에 고온 Dry-O2어닐링을 실시하는 제3단계로 이루어지는 것을 특징으로 하는 반도체 장치의 커패시터 제작방법.
  2. 제1항에 있어서, 상기 UV-O3어닐링은 200℃ ∼ 400℃의 온도 범위 내에서 실시하는 것을 특징으로 하는 반도체 장치의 커패시터 제작방법.
  3. 제1항에 있어서, 상기 UV-O3어닐링은 1회 어닐링시마다 1분 ∼ 60분 정도 실시하는 것을 특징으로 하는 반도체 장치의 커패시터 제작방법.
  4. 제1항에 있어서, 상기 하부 전극으로 doped Poly-Si, WN, TiN, Pt, WSi의 단일막 또는 복합막을 사용하는 것을 특징으로 하는 반도체 장치의 커패시터 제작방법.
  5. 제1항에 있어서, 상기 상부 전극으로 doped Poly-Si, WN, TiN, Pt, WSi의 단일막 또는 복합막을 사용하는 것을 특징으로 하는 반도체 장치의 커패시터 제작방법.
  6. 제1항에 있어서, 상기 Ta2 O5는 1회 증착시마다 10Å ∼ 500Å의 두께를 가지도록 하는 것을 특징으로 하는 반도체 장치의 커패시터 제작방법.
  7. 제1항에 있어서, 상기 고온 Dry-O3어닐링은 600∼800℃에서 10~60분간 실시하는 것을 특징으로 하는 반도체 장치의 커패서터 제작방법.
KR1019950028572A 1995-09-01 1995-09-01 반도체 장치의 캐패시터 제작방법 KR0183732B1 (ko)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1019950028572A KR0183732B1 (ko) 1995-09-01 1995-09-01 반도체 장치의 캐패시터 제작방법
JP8223983A JPH09121035A (ja) 1995-09-01 1996-08-26 半導体素子のキャパシタ製造方法
TW085110643A TW366553B (en) 1995-09-01 1996-08-31 Manufacturing method for capacitor of semiconductor device
US08/707,298 US5837593A (en) 1995-09-01 1996-09-03 Methods of fabricating microelectronic capacitors having tantalum pentoxide dielectrics
US09/152,764 US6118146A (en) 1995-09-01 1998-09-14 Microelectronic capacitors having tantalum pentoxide dielectrics

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950028572A KR0183732B1 (ko) 1995-09-01 1995-09-01 반도체 장치의 캐패시터 제작방법

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KR970018493A true KR970018493A (ko) 1997-04-30
KR0183732B1 KR0183732B1 (ko) 1999-03-20

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KR1019950028572A KR0183732B1 (ko) 1995-09-01 1995-09-01 반도체 장치의 캐패시터 제작방법

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US (2) US5837593A (ko)
JP (1) JPH09121035A (ko)
KR (1) KR0183732B1 (ko)
TW (1) TW366553B (ko)

Cited By (4)

* Cited by examiner, † Cited by third party
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KR100325428B1 (ko) * 1998-11-19 2002-07-08 윤종용 탄탈륨 옥사이드를 포함하는 커패시터의 형성방법
KR100547248B1 (ko) * 1999-11-12 2006-02-01 주식회사 하이닉스반도체 알루미나를 사용한 반도체 소자의 게이트 절연막 형성방법
KR100492992B1 (ko) * 1997-12-01 2006-04-21 삼성전자주식회사 반도체장치의커패시터형성방법
KR100538074B1 (ko) * 1998-06-30 2006-04-28 주식회사 하이닉스반도체 반도체 소자의 캐패시터 제조 방법

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KR100252055B1 (ko) * 1997-12-11 2000-04-15 윤종용 커패시터를 포함하는 반도체장치 및 그 제조방법
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JP2000012796A (ja) * 1998-06-19 2000-01-14 Hitachi Ltd 半導体装置ならびにその製造方法および製造装置
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KR100433465B1 (ko) * 1998-08-03 2004-05-31 닛본 덴끼 가부시끼가이샤 금속산화물유전체막의 기상성장방법 및 금속산화물유전체재료의 기상성장을 위한 장치
JP3189813B2 (ja) * 1998-11-30 2001-07-16 日本電気株式会社 半導体装置の製造方法
KR100293713B1 (ko) * 1998-12-22 2001-07-12 박종섭 메모리소자의 커패시터 제조방법
KR100326269B1 (ko) * 1998-12-24 2002-05-09 박종섭 반도체소자의고유전체캐패시터제조방법
KR100304699B1 (ko) * 1999-01-05 2001-09-26 윤종용 탄탈륨 산화막을 갖춘 커패시터 제조방법
JP3251256B2 (ja) 1999-03-01 2002-01-28 沖電気工業株式会社 半導体装置の製造方法
US6281142B1 (en) * 1999-06-04 2001-08-28 Micron Technology, Inc. Dielectric cure for reducing oxygen vacancies
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US5837593A (en) 1998-11-17

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