KR970018485A - 반도체 장치 - Google Patents

반도체 장치 Download PDF

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KR970018485A
KR970018485A KR1019960042467A KR19960042467A KR970018485A KR 970018485 A KR970018485 A KR 970018485A KR 1019960042467 A KR1019960042467 A KR 1019960042467A KR 19960042467 A KR19960042467 A KR 19960042467A KR 970018485 A KR970018485 A KR 970018485A
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semiconductor chip
electrode pad
chip
functional
semiconductor
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KR1019960042467A
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다다아키 마무라
다카유키 요시다
이치로 야마네
다키오 야마시타
도시오 마쯔키
요시아키 가스가
히로아키 후지모토
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모리시다 요이치
마쯔시다 덴키 산교 가부시키가이샤
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Publication of KR970018485A publication Critical patent/KR970018485A/ko

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    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H—ELECTRICITY
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    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
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Abstract

개발공정수의 증대를 초래하지 않고, 고속으로 동작함과 동시에 고기능을 가지는 에뮬레이터를 제공한다. 마이크로컴퓨터 칩(101)에는 CPU 코어(주변회로, 내장 ROM 및 내장 RAM이 형성되어 있다. 에뮬레이션 기능칩(102)에는 에뮬레이션 전체를 제어하는 에뮬레이션 제어회로가 형성되어 있다. 마이크로컴퓨터 칩(101)이 기능면에 형성된 제1 전극패드(103)와 에뮬레이션 기능칩(102)의 기능면에 형성된 제2 전극패드(104)는 접속용 범프(105)를 통햐어 전기적으로 접속되어 있고, 양자가 접속된 상태에서 마이크로컴퓨터 칩(101)과 에뮬레이션 기능칩(102)은 절연수지(106)에 의하여 모듈화되어 있다.

Description

반도체 장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제도1는 본 발명에 제1실시예에 의한 반도체 장치로서의 에뮬레이터의 단면도.

Claims (14)

  1. CPU 코어, 주변회로 및 내장 RAM을 구비하며, 에뮬레이션 기능소자를 구비하지 않는 마이크로 컴퓨터 칩으로 이루어지는 제1반도체 칩과, 상기 제1반도체 칩보다도 면적이 크며 에뮬레이션 기능소자를 구비하는 제2반도체 칩을 포함하고, 상기 제1반도체 칩의 전극패드와 상기 제2반도체 칩의 전극패드는 범프를 통하여 전기적으로 접속되는 것을 특징으로 하는 반도체 장치.
  2. CPU 코어, 주변회로 및 내장 RAM을 포함하는 한편, 소거형 또는 바꿔쓰기형 비휘발성 메모리를 구비하지 않는 마이크로컴퓨터 칩으로 이루어지는 제1반도체 칩과, 상기 제1반도체 칩 보다 면적이 크며 소거형 또는 바꿔쓰기형의 비휘발성 메모리를 구비하는 제2반도체 칩을 포함하며, 상기 제1반도체 칩의 전극패드와 상기 제2반도체 칩의 전극패드는 범프를 통하여 전기적으로 접속되는 것을 특징으로 하는 반도체 장치.
  3. 제1기능소자가 형성된 제1반도체 칩과, 제2기능소자가 형성된 제2반도체 칩을 포함하며, 상기 제1반도체 칩과 상기 제2반도체 칩은, 상기 제1 기능소자가 형성된 기능면과 상기 제2기능소자가 형성된 기능면이 서로 대향하도록 설치되며, 상기 제1반도체 칩의 제1 전극패드와 상기 제2반도체 칩의 제2전극패드는 범프를 통하여 전기적으로 접속되고, 상기 제1전극패드는 상기 제1기능소자가를 구성하는 베선층 중 최상층의 배선층과 동일한 층에서의 상기 제1기능소자가가 형성되어 있는 영역 위에 형성되는 것을 특징으로 하는 반도체 장치.
  4. 제3하에 있어서, 상기 제1전극패드는 상기 제1기능소자가를 구성하는 기능블록의 주변부 영역 위에 형성되며 상기 기능블록에 대하여 상기 제1반도체 칩의 외부와 신호의 입출력을 행하는 것을 특징으로 하는 반도체 장치.
  5. 제3항에 있어서, 상기 제1전극패드는 상기 제1기능소자가를 구성하는 기능블록의 내부영역위에 형성되며 상기 기능블록에 대하여 상기 제1반도체 칩의 외부와 신호의 입출력을 행하는 것을 특징으로 하는 반도체 장치.
  6. 제4항 또는 제5항에 있어서, 상기 제1반도체 칩은 마이크로 컴퓨터 칩이며, 상기 기능블록은 CPU 코어인 것을 특징으로 하는 반도체 장치.
  7. 제3항에 있어서, 상기 제1전극패드는 상기 제1기능소자가를 구성하는 신호 입출력 회로소자 상부에 형성되는 것을 특징으로 하는 반도체 장치.
  8. 제3항에 있어서, 상기 제1반도체 칩은 CPU 코어, 주변회로 및 내장 RAM을 구비하나, 에뮬레이션 기능소자는 구비하지 않는 마이클컴퓨터 칩이며, 상기 제2반도체 칩은 에뮬레이션 기능소자를 포함하는 것을 특징으로 하는 반도체 장치.
  9. 제3항에 있어서, 상기 제1반도체 칩은 CPU 코어, 주변회로 및 내장 RAM을 포함하나, 소거형 또는 바꿔쓰기형의 비휘발성 메모리를 포함하지 않는 마이크로컴퓨터 칩이며, 상기 제2반도체 칩은 소거형 또는 바꿔쓰기형의 비휘발성 메모리를 포함하는 것을 특징으로 하는 반도체 장치.
  10. 기능소자가 형성된 반도체 칩과, 상기 반도체 칩이 페이스 다운에 의하여 실장된 회로기판을 포함하며, 상기 반도체 칩의 제1 전극패드와 상기 회로기판의 제2전극패드는 범프를 통하여 전기적으로 접속되어 있고, 상기 제1전극패드는 상기 기능소자를 구성하는 배선층 중 최상층의 배선층과 동일한 층에서의 상기 기능소자가 형성되어 있는 영역의 위에 형성되는 것을 특징으로 하는 반도체 장치.
  11. 제10항에 있어서, 상기 제1전극패드는 상기 기능소자를 구성하는 기능블록의 주변부 영역의 우에 형성되며, 상기 기능블록에 대하여 상기 반도체 칩의 외부와 신호의 입출력을 행하는 것을 특징으로 하는 반도체 장치.
  12. 제10항에 있어서, 상기 제1전극패드는 상기 기능소자를 구성하는 기능블록의 내부영역의 위에 형성되며 상기 기능블록에 대하여 상기 반도체 칩의 외부와 신호의 입출력을 행하는 것을 특징으로 하는 반도체 장치.
  13. 제11항 또는 제12항에 있어서, 상기 반도체 칩은 마이크로컴퓨터 칩이며, 상기 기능블록은 CPU 코어인 것을 특징으로 하는 반도체 장치.
  14. 제10항에 있어서, 상기 제1전극패드는 상기 기능소자를 구성하는 신호 입출력 회로소자의 위에 형성되는 것을 특징으로 하는 반도체 장치.
KR1019960042467A 1995-09-28 1996-09-25 반도체 장치 KR970018485A (ko)

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Application Number Priority Date Filing Date Title
JP25115295 1995-09-28
JP95-251152 1995-09-28
JP96-116138 1996-05-10
JP8116138A JPH09152979A (ja) 1995-09-28 1996-05-10 半導体装置

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EP (1) EP0766311A3 (ko)
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