KR960026262A - 실리사이드층 형성방법 - Google Patents
실리사이드층 형성방법 Download PDFInfo
- Publication number
- KR960026262A KR960026262A KR1019940035434A KR19940035434A KR960026262A KR 960026262 A KR960026262 A KR 960026262A KR 1019940035434 A KR1019940035434 A KR 1019940035434A KR 19940035434 A KR19940035434 A KR 19940035434A KR 960026262 A KR960026262 A KR 960026262A
- Authority
- KR
- South Korea
- Prior art keywords
- spacer
- silicide layer
- predetermined pattern
- formation method
- layer formation
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 8
- 229910021332 silicide Inorganic materials 0.000 title claims abstract description 6
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 title claims abstract description 6
- 230000015572 biosynthetic process Effects 0.000 title 1
- 125000006850 spacer group Chemical group 0.000 claims abstract 8
- 239000002184 metal Substances 0.000 claims abstract 3
- 238000004519 manufacturing process Methods 0.000 claims abstract 2
- 239000004065 semiconductor Substances 0.000 claims abstract 2
- 239000011856 silicon-based particle Substances 0.000 claims abstract 2
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Ceramic Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
본 발명은 반도체 소자 제조공정 중 실라사이드층(19) 형성방법에 있어서, 소정 패턴(14,15) 측벽에 스페이서(17)를 형성하되, 스페이서 상부에 형성된, 금속층(18)에 의한 실리콘 입자의 소모를 최소화시키기 위해 상기 스페이서(17)의 최상단을 상기 소정 패턴의 최상단보다 아래에 위치하도록 하는 것을 특징으로 하여, 스페이서(17)로 인한 게이트 전극과 같은 패턴의 흼 형상 발생을 최소화하고, 이에따라 소자의 성능을 향상시킬 수 있는 특유의 효과가 있는 실리사이드층 형성방법에 관한 것이다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2C도는 본 발명에 따른 실리사이드층 형성과정을 도시한 공정 단면도.
Claims (3)
- 반도체 소자 제조공정 중 실라사이드층 형성방법에 있어서, 소정 패턴 측벽에 스페이서를 형성하되, 스페이서 상부에 형성된 금속층에 의한 실리콘 입자의 소모를 최소화시키기 위해 상기 스페이서의 최상단을 상기 소정 패턴의 최상단보다 아래에 위치하도록 하는 것을 특징으로 하는 실리사이드층 형성방법.
- 제1항에 있어서, 상기 소정 패턴은 게이트 전극인 것을 특징으로 하는 실리사이드층 형성방법.
- 제1항에 있어서, 상기 스페이서의 최상단은, 상기 소정 패턴 최상단으로부터 이후 형성될 상기 금속층 두께의 1 내지 3배 만큼 아래에 위치하는 것을 특징으로 하는 실리사이드층 형성방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940035434A KR100219044B1 (ko) | 1994-12-20 | 1994-12-20 | 반도체 소자의 실리사이드 게이트 전극 형성방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940035434A KR100219044B1 (ko) | 1994-12-20 | 1994-12-20 | 반도체 소자의 실리사이드 게이트 전극 형성방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960026262A true KR960026262A (ko) | 1996-07-22 |
KR100219044B1 KR100219044B1 (ko) | 1999-09-01 |
Family
ID=19402528
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019940035434A KR100219044B1 (ko) | 1994-12-20 | 1994-12-20 | 반도체 소자의 실리사이드 게이트 전극 형성방법 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100219044B1 (ko) |
-
1994
- 1994-12-20 KR KR1019940035434A patent/KR100219044B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR100219044B1 (ko) | 1999-09-01 |
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