KR960005910A - 반도체 집적 회로 칩상의 범프용 실링구조 - Google Patents

반도체 집적 회로 칩상의 범프용 실링구조 Download PDF

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Publication number
KR960005910A
KR960005910A KR1019950021795A KR19950021795A KR960005910A KR 960005910 A KR960005910 A KR 960005910A KR 1019950021795 A KR1019950021795 A KR 1019950021795A KR 19950021795 A KR19950021795 A KR 19950021795A KR 960005910 A KR960005910 A KR 960005910A
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South Korea
Prior art keywords
semiconductor integrated
integrated circuit
chip
circuit chip
bumps
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KR1019950021795A
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English (en)
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KR0163782B1 (ko
Inventor
데루오 구사까
나오지 센바
아쓰시 니시자와
노부아끼 다까하시
Original Assignee
가네꼬 히사시
닛뽕덴끼 가부시끼가이샤
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Publication of KR960005910A publication Critical patent/KR960005910A/ko
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Publication of KR0163782B1 publication Critical patent/KR0163782B1/ko

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Abstract

범프를 통해 회로판상에 접합되고 반도체 집적 회로 칩위에 복수개의 패드가 형성된 반도체 집적 회로 칩상의 범프용 실링구조가 제공된다. 각 패드위에는 범프가 형성된다. 상기 복수개의 범프의 표면 이상을 덮도록 코팅 물질이 제공된다. 이 물질이, 회로판상에 칩이 접합될 때, 변형되도록 충분히 작은 경도를 가지는 절연 물질로 제조됨으로써 각 범프의 상부 이상이 회로판에 제공된 패드와 접촉하게 된다.

Description

반도체 집적 회로 칩상의 범프용 실링구조
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 범프를 통하여 회로판상에 접합되는 반도체 집적 회로 칩상의 범프용 실링구조를 나타내는 단면도.
제3a도 및 제3b도는 본 발명에 따라서, 제1실시예부터 제4실시예에서 반도체 집적회로칩상에 범프를 형성하는 일련의 공정을 나타내는 단면도.
제4도는 본 발명에 따라서, 제1실시예에서 범프를 통하여 회로판상에 접합되는 반도체 집적 회로 칩상의 범프용 신규의 실링구조를 나타내는 단면도.
제5도는 본 발명에 따라서, 제1실시예에서 범프를 통하여 회로판상에 칩을 접합할 경우, 범프용의 개선된 실링구조를 갖는 반도체 집적 회로칩을 나타내는 단면도.

Claims (30)

  1. 범프를 통해 회로판상에 접합되는반도체 집적 회로 칩에 있어서, 상기 반도체 집적 회로 칩상에 형성되며 각각의 패드위에 범프가 형성되는 복수개의 패드와, 상기 복수개의 표면 이상을 덮도록 제공되고, 상기 회로판상에 상기 칩을 접합시킬 때, 변형됨으로써 상기 각 범프의 상부이상이 상기 회로판에 제공된 패드와 접촉되도록 충분히 작은 경도를 가지는 절연막으로 제조된 코팅물질을 구비하는 반도체 집적 회로 칩.
  2. 제1항에 있어서, 상기 코팅물질이 1000cP~2000cP 의 점성률을 가지는 젤라틴 물질을 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  3. 제2항에 있어서, 상기 젤라틴 물질이, 상기 칩의 전체 표면 위에 형성되고 그 안에 복수개의 범프가 묻히는 막을 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  4. 제3항에 있어서, 상기 젤라틴 물질이 실리콘을 포함하는 것을 특징으로 하는 반도체 집적 회로 칩.
  5. 제1항에 있어서, 상기 코팅물질이 마이크로 캡슐 물질을 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  6. 제5항에 있어서, 상기 마이크로 캡슐 물질이, 상기 칩의 전체 표면위에 형성되고 그 안에 복수개의 범프가 묻히는 막을 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  7. 제1항에 있어서, 상기 코팅물질이 1000cP~2000cP의 점성률을 가지는 크림 물질을 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  8. 제7항에 있어서, 상기 크림 물질이 상기 칩의 전체 표면위에 형성되고 그 안에 복수개의 범프가 묻히는 막을 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  9. 제8항에 있어서, 상기 크림 물질이 알콜계의 솔벤트에 용해된 에폭시 수지를 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  10. 제1항에 있어서, 상기 열가소성 수지가 경화될 때 외에는 상기 코팅물질이 1000cP~2000cP의 점성률을 나타내는 열가소성 수지를 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  11. 제10항에 있어서, 상기 열가소성 수지가, 상기 칩의 전체 표면위에 형성되고 그안에 복수개의 범프가 묻히는 막의 형태로 존재하는 것을 특징으로 하는 반도체 집적 회로 칩.
  12. 제10항에 있어서, 상기 열가소성 수지가 페놀계 수지인 것을 특징으로 하는 반도체 집적 회로 칩.
  13. 범프를 통해 회로판상에 접합되는 반도체 집적 회로 칩에 있어서, 상기 반도체 집적 회로 칩상에 형성되는 복수개의 패드와, 상기 범프가 비등방성 전도막을 통해 상기 회로판의 패드와 접촉하도록 상기 복수개의 범프상에 제공되고, 비등방성 전도막의 표면을 따라 흐르는 전류를 방지하고 비등방성 전도막의 표면에 대하여수직방향으로 전류를 흐르게 함으로써, 상기 각 범프가 이방성 전도막을 통하여 상기 회로판 상의 대응 패드에 전기적으로 전도되며, 상기 패드들 사이 및 상기 회로판 상의 패드 사이에 도전성이 없도록 하는 비등방성 전도막을 구비하는 반도체 집적 회로 칩.
  14. 제13항에 있어서, 상기 비등방성 전도막이 그 안에 2차원 배열의 도전입자를 포함하는 절연시트를 구비하고, 상기 절연시트가 상기 회로판상의 칩에 접합될 때 상기 절연시트가 변형되도록 충분히 작은 경도를 가짐으로써 상기 도전성 입자가 상기 칩상과 상기 회로판상에 형성된 상기 양 패드와 접촉되는 것을 특징으로 하는 반도체 집적 회로 칩.
  15. 제13항에 있어서, 상기 비등방성 전도막이, 상기 회로판 상에 상기 칩이 접합될때, 2창원배열의 컬럼형전도물질이 상기 칩상과 상기 회로판상에 형성된 상기 양 패드와 접촉되도록 절연시트의 대향 표면에 노출된2차원 배열의 칼럼형 전도물질을 포함하는 절연시트를 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  16. 범프를 통해 회로판상에 접합되는 반도체 집적 회로 칩에 있어서, 상기 반도체 집적 회로 칩상에 형성된 복수개의 패드와, 유기절연물질로 제조되어 상기 칩의 전체 표면상에 형성되고, 각 개구를 통하여 상기 각 패드의 일부분 이상이 노출되도록 상기 각 패드 위에 위치한 복수개의 개구를 가지는 유기절연막과, 상기 각 패드 표면의 노출부분상, 상기 각 개구의 측벽상 및 상기 각 개구근방의 상기 유기절연막의 상부 표면상에 각각 선택적으로 형성된 복수개의 금속막과, 상기 금속막위에 상기 금속막을 통해 상기 패드와 전기적으로 접속되도록 형성된 복수개의 범프와, 상기 복수개의 표면 이상을 덮도록 제공되고, 상기 회로판상에 상기 칩을 접합시킬 때, 변형됨으로써, 상기 각 범프의 상부이상이 상기 회로판에 제공된 패드와 접촉되도록 충분히 작은 경도를 가지는 절연막으로 제조된 코팅물질을 구비하는 반도체 집적 회로 칩.
  17. 제16항에 있어서, 상기 코팅물질이 1000cP~2000cP 의 점성률을 가지는 젤라틴 물질을 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  18. 제17항에 있어서, 상기 젤라틴 물질이 상기 칩의 전체 표면위에 형성되고 그 안에 복수개의 범프가 묻히는 막을 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  19. 제18항에 있어서, 상기 젤라틴 물질이 실리콘을 포함하는 것을 특징으로 하는 반도체 집적 회로 칩.
  20. 제16항에 있어서, 상기 코팅물질이 마이크로 캡슐 물질을 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  21. 제20항에 있어서, 상기 마이크로 캡슐 물질이 상기 칩의 전체 표면위에 형성되고 그 안에 복수개의 범프가 묻히는 막을 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  22. 제16항에 있어서, 상기 코팅물질이 1000cP~2000cP 의 점성률을 가지는 크림 물질을 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  23. 제22항에 있어서, 상기 크림 물질이 상기 칩의 전체 표면위에 형성되고 그 안에 복수개의 범프가 묻히는 막을 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  24. 제22항에 있어서, 상기 크림 물질이 알콜계의 솔벤트에 용해된 에폭시 수지를 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  25. 제16항에 있어서, 상기 열가소성 수지가 경화될 때 외에는 상기 코팅물질이 1000cP~2000cP 의 점성률을 나타내는 열가소성 수지를 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
  26. 제25항에 있어서, 상기 열가소성 수지가 상기 칩의 전체 표면위에 형성되고 그안에 복수개의 범프가 묻히는 막의 형태로 존재하는 것을 특징으로 하는 반도체 집적 회로 칩.
  27. 제25항에 있어서, 상기 열가소성 수지가 페놀계 수지인 것을 특징으로 하는 반도체 집적 회로 칩.
  28. 범프를 통해 회로판상에 접합되는 반도체 집적 회로 칩에 있어서, 상기 반도체 집적 회로 칩상에 형성된 복수개의 패드와, 유기절연물질로 제조되어 상기 칩의 전체 표면 상에 형성되고,각 개구를 통하여 상기 각 패드의 일부분 이상이 노출되도록 상기 각 패드위에 위치한 복수개의 개구를 가지는 유기절연막과, 상기 각 패드의 노출부분상, 상기 각 개구의 측벽상 및 상기 각 개구근방의 상기 유기절연막의 상부 표면상에 각각 선택적으로 형성된 복수개의 금속막과, 상기 금속막 위에, 각각이 편평한 상부를 가지고 상기 금속막을 통해 상기 패드와 전기적으로 접속되도록 형성된 복수개의 범프와, 상기 범프의 상기 편평한 상부상을 제외하고 상기 유기절연막상에 형성되며, 절연막의 상부가 상기 범프의 편평한 상부와 동일한 높이를 가지도록 두께가 조절된 절연막과, 상기 범프가 비등방성 전도막을 통해 상기 회로판의 패드와 접촉하도록 상기 복수개의 범프상에 제공되고, 비등방성 전도막의 표면을 따라 흐르는 전류를 방지하고 비등방성 전도막의 표면에 대하여수직방향으로 전류를 흐르게 함으로써 상기 각 범프가 이방성 전도막을 통하여 상기 회로판상의 대응 패드에 전기적으로 전도되며, 상기 패드들 사이 및 상기 회로판 상의 패드사이에 도전성이 없도록 하는 비등방성 전도막을 구비하는 반도체 집적 회로 칩.
  29. 제28항에 있어서, 상기 비등방성 전도막은 그 내부에 2차원 배열의 도전성 입자를 포함하며, 상기 전도성 입자가 상기 칩과 상기 회로 기판상에 형성된 상기 양 패드에 접촉되어 상기 회로 기판상에 상기 칩이 접합될때 변형가능하도록 충분희 작은 경도를 갖는 절연시트르르 구비하는 반도체 집적 회로 칩.
  30. 제28항에 있어서, 상기 비등방성 전도막이, 상기 회로판 상에 칩이 접합될때, 2차원 배열의 칼럼형 전도물질이 상기 칩상과 상기 회로판상에 형성된 상기 향패드와 접촉되도록 절연시트의 대향 표면에 노출된 2차원 배열의 컬럼형 전도물질을 포함하는 절연시트를 구비하는 것을 특징으로 하는 반도체 집적 회로 칩.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950021795A 1994-07-22 1995-07-22 반도체 집적 회로 칩상의 범프용 실링구조 KR0163782B1 (ko)

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