KR960005853A - Vlsi 및 ulsi 상호 접속 시스템용 다이아몬드상 탄소 - Google Patents
Vlsi 및 ulsi 상호 접속 시스템용 다이아몬드상 탄소 Download PDFInfo
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- KR960005853A KR960005853A KR1019950020274A KR19950020274A KR960005853A KR 960005853 A KR960005853 A KR 960005853A KR 1019950020274 A KR1019950020274 A KR 1019950020274A KR 19950020274 A KR19950020274 A KR 19950020274A KR 960005853 A KR960005853 A KR 960005853A
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- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 title claims abstract description 34
- 229910052799 carbon Inorganic materials 0.000 title claims abstract description 15
- 229910003460 diamond Inorganic materials 0.000 title claims 19
- 239000010432 diamond Substances 0.000 title claims 19
- 239000004065 semiconductor Substances 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims abstract 13
- 239000000758 substrate Substances 0.000 claims abstract 13
- 239000012212 insulator Substances 0.000 claims abstract 7
- 239000004020 conductor Substances 0.000 claims abstract 5
- 229910003481 amorphous carbon Inorganic materials 0.000 claims 26
- 239000003575 carbonaceous material Substances 0.000 claims 26
- 239000003610 charcoal Substances 0.000 claims 20
- 239000002184 metal Substances 0.000 claims 19
- 229910052751 metal Inorganic materials 0.000 claims 19
- 229910045601 alloy Inorganic materials 0.000 claims 5
- 239000000956 alloy Substances 0.000 claims 5
- 229910052710 silicon Inorganic materials 0.000 claims 5
- 229910052721 tungsten Inorganic materials 0.000 claims 5
- 229910004298 SiO 2 Inorganic materials 0.000 claims 4
- 229910052782 aluminium Inorganic materials 0.000 claims 4
- 229910052802 copper Inorganic materials 0.000 claims 4
- 238000005530 etching Methods 0.000 claims 3
- 229910052731 fluorine Inorganic materials 0.000 claims 3
- 239000007789 gas Substances 0.000 claims 3
- 238000001020 plasma etching Methods 0.000 claims 3
- 229910052715 tantalum Inorganic materials 0.000 claims 3
- 229910052719 titanium Inorganic materials 0.000 claims 3
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 2
- HYXIRBXTCCZCQG-UHFFFAOYSA-J [C+4].[F-].[F-].[F-].[F-] Chemical compound [C+4].[F-].[F-].[F-].[F-] HYXIRBXTCCZCQG-UHFFFAOYSA-J 0.000 claims 2
- 230000000295 complement effect Effects 0.000 claims 2
- 230000005669 field effect Effects 0.000 claims 2
- 239000011737 fluorine Substances 0.000 claims 2
- 238000007737 ion beam deposition Methods 0.000 claims 2
- 238000000608 laser ablation Methods 0.000 claims 2
- 229910044991 metal oxide Inorganic materials 0.000 claims 2
- 150000004706 metal oxides Chemical class 0.000 claims 2
- 238000004544 sputter deposition Methods 0.000 claims 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims 1
- 229910052581 Si3N4 Inorganic materials 0.000 claims 1
- 239000002194 amorphous carbon material Substances 0.000 claims 1
- 150000001721 carbon Chemical group 0.000 claims 1
- 238000005229 chemical vapour deposition Methods 0.000 claims 1
- 229910052804 chromium Inorganic materials 0.000 claims 1
- 239000003989 dielectric material Substances 0.000 claims 1
- 125000001153 fluoro group Chemical group F* 0.000 claims 1
- 229910052739 hydrogen Inorganic materials 0.000 claims 1
- 239000001257 hydrogen Substances 0.000 claims 1
- 238000009413 insulation Methods 0.000 claims 1
- 150000002500 ions Chemical class 0.000 claims 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims 1
- 238000005498 polishing Methods 0.000 claims 1
- 102000004169 proteins and genes Human genes 0.000 claims 1
- 108090000623 proteins and genes Proteins 0.000 claims 1
- 235000012239 silicon dioxide Nutrition 0.000 claims 1
- 239000000377 silicon dioxide Substances 0.000 claims 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 1
- 238000000992 sputter etching Methods 0.000 abstract 1
- 239000011810 insulating material Substances 0.000 description 1
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/314—Inorganic layers
- H01L21/3146—Carbon layers, e.g. diamond-like layers
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- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
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Abstract
본 발명은 집적 회로 칩상의 도체의 하나 이상의 레벨을 이격시키기 위한 절연체로서 다이아몬드상 탄소를 구성요소 중 하나로 포함하는 반도체 소자에 관한 것이다. 본 발명은 또한 집적 구조의 형성 방법 및 이 방법에 의해 제조된 집적구조에 관한 것이다. 또한, 본 발명은 다이아몬드상 탄소층을 함유하는 기판으로부터 이 층을 선택적으로 이온 에칭시키는 방법도 제공한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 반도체 소자의 두 레벨을 이격시키기 위한 절연 재로로서 다이아몬드상(diamond-like) 탄소층을 함유하는 반도체 소자의 단면도이다.
Claims (30)
- 노출된 제1금속층을 포함하는 상부 표면을 갖는 기판; 상기 가판의 상부 표면 위에 형성된 다이아몬드상 탄소 재료 절연층; 및 상기 절연층 위에 다수의 도체를 형성하기 위한 패턴화된 제2금속층을 포함하는, 집적회로 반도체 소자 상의 도체의 하나 이상의 레벨을 이격시키기 위한 절연체.
- 제1항에 있어서, 상기 노출된 제1금속층이 Al, Cu, W, Ta, Ti 및 이들의 합금으로 이루어지는 군에서 선택되는 적어도 하나의 금속인 반도체 소자의 절연체.
- 제1항에 있어서, 상기 다이아몬드상 탄소 재료가 수소첨가 비정질 탄소, 비정질 탄소, 비정질 다이아몬드, 수소첨가된 불화 비정질 탄소, 불화 비정질 탄소 및 불화 비정질 다이아몬드로 이루어지는 군에서 선택되는 것인 반도체 소자의 절연체.
- 제1항에 있어서, 상기 다이아몬드상 탄소 재료가 플라즈마원(plasma-assisted)화학증착법, 스퍼터링, 이온 비임 증착법 및 레이저 애블레이션(ablation)으로 이루어지는 군에서 선택되는 방법에 의해 형성되는 것인 반도체 소자의 절연체.
- 제1항에 있어서, 상기 기판이 적어도 하나의 전계 효과 트랜지스터(FET)를 함유하는 집적회로 칩인 반도체 소자의 절연체.
- 제1항에 있어서, 상기 기관이 상보 금속 산화물 반도체(CMOS) 소자를 함유하는 집적회로 칩인 반도체 소자의 절연체.
- 노출된 제1금속 영역 및 SiO2와 다이아몬드상 탄소 재료로 이루어지는 군에서 선택되는 노출된 제2절연 영역을 포함하는 상부 표면을 갖는 기관; 상기 기판의 상부 표면 위에 형성된 제1다이아몬드상 탄소 재료층; 상기 제1층 위에 다수의 도체를 형성하기 위한 패턴화된 제2금속층; 및 선택된 제1금속 영역들을 상기 다수의도체 중 하나 이상에 전기적으로 접속시키는 금속 관통부(feed through)를 포함하는 집적 반도체 소자에 사용하기 위한 상호 접속 구조.
- 제7항에 있어서, 상기 노출된 제1금속 영역이 Al, Cu, W, Ta, Ti 및 이들의 합금으로 이루어지는 군에서 선택되는 적어도 하나의 금속인 반도체 소자의 상호 접속 구조.
- 제7항에 있어서, 상기 다이아몬드상 탄소 재료가 수소첨가 비정질 탄소, 비정질 탄소, 비정질 다이아몬드, 수소첨가된 불화 비정질 탄소, 불화 비정질 탄소 및 불화 비정질 다이아몬드로 이루어지는 군에서 선택되는 것인 반도체 소자의 상호 접속 구조.
- 제7항에 있어서, 상기 다이아몬드상 탄소 재료가 플라즈마원 화학증착법, 스퍼터링, 이온 비임 증착법 및 레이저 애블레이션으로 이루어지는 군에서 선택되는 방법에 의해 형성되는 반도체 소자의 상호 접속 구조.
- 제7항에 있어서, 상기 기관이 적어도 하나의 전계 효과 트랜지스터(FET)를 함유하는 집적회로 칩인 반도체 소자의 상호 접속 구조.
- 제7항에 있어서, 상기 기판이 상보 금속 산화물 반도체(CMOS) 소자를 함유하는 집적회로 칩인 반도체 소자의 상호 접속 구조.
- 제1도전성 영역을 포함하는 상부 표면을 갖는 기판; 수소첨가 비정질탄소, 비정질탄소, 비정질 다이아몬드, 불화 다이아몬드상 탄소로 이루어지는 군에서 선택되는 제1다이아몬드상 탄소 재료층(여기서, 다이아몬드상 탄소 재료는 v원자%의 Si또는 Ge으로 도프됨);및 수소첨가 비정질 탄소, 비정질 탄소,비정질 다이아몬드 및 불화 다이아몬드상 탄소로 이루어지는 군에서 선택되는 제2다이아몬드상 탄소 재료층(여기서, 다이아몬드상 탄소 재료는 w원자%의 Si 또는 Ge으로 도프되고; 상기 v 및 w는 동일하거나 상이하며 약 0 내지 약 25범위임)을 포함하며, 상기 제2층은 그 위에 형성된 제1금속의 제1상호 접속 패턴을 갖고, 상기 제1및 제2층 은 상기 제1도전성 영역 중 선택된 영역들과 상기 제1상호 접속 패턴을 상호 접속시키는 제2금속의 스터드(stud)를 갖는 것인, 집적회로 칩에 사용하기 위한 상호 접속 구조.
- 제13항에 있어서, v가 약 5 내지 약 15이고, w가 약 2 내지 약 15인 상호 접속 구조.
- 제13항에 있어서, 상기 불화 다이아몬드상 탄소가 이 불화 다이아몬드상 탄소의 탄소 원자에 공유 결합된 불소 원자를 적어도 1원% 함유하는 상호 접속 구조.
- 제13항에 있어서, 상기 다이아몬드상 탄소 재료가 수소첨가 비정질 탄소인 상호 접속 구조.
- 제13항에 있어서, 상기 제1금속이 Al, Cu, W 및 이들의 합금으로 이루어지는 군에서 선택되는 것인 상호 접속 구조.
- 제13항에 있어서, 상기 제2금속이 Al, Cu, W 및 이들의 합금으로 이루어지는 군에서 선택되는 것인 상호 접속 구조.
- 제18항에 있어서, 추가로 상기 제1 또는 제2금속의 상기 제1층의 측벽과 상기 제1 또는 제2다이아몬드상 탄소 재료층 사이에 제3금속층을 포함하는 상호 접속 구조.
- 제19항에 있어서, 상기 제3금속이 Ta, Ti, W, Cr및 이들의 합금으로 이루어지는 군에서 선택되는 것인 상호 접속 구조.
- 도전성 영역을 포함하는 상부 표면을 갖는 기판의그 상부 표면 위에 수소첨가 비정질탄소, 비정질탄소, 비정질 다이아몬드, 불화 다이아몬드상 탄소로 이루어지는 군에서 선택되는 제1다이아몬드상 탄소 재료층을 형성하는 단계(여기서, 다이아몬드상 탄소 재료는 v원자%의 Si또는 Ge으로 도프됨);상기 제1층 위에 수소첨가 비정질 탄소, 비정질 탄소,비정질 다이아몬드 및 불화 다이아몬드상 탄소로 이루어지는 군에서 선택되는 제2다이아몬드상 탄소 재료층을 형성하는 단계(여기서, 다이아몬드상 탄소 재료는 w 원자%의 Si 또는 Ge으로 도프됨); 상기 제2층 위에 수소첨가비정질 탄소, 비정질 탄소,비정질 다이아몬드 및 불화 다이아몬드상 탄소로 이루어지는 군에서 선택되는 제3다이아몬드상 탄소 재료층을 형성하는 단계(여기서, 다이아몬드상 탄소 재료는 x원자%의 Si또는 Ge으로 도프됨); 상기 제3층 위에 수소첨가비정질 탄소, 비정질 탄소,비정질 다이아몬드 및 불화 다이아몬드상 탄소로 이루어지는 군에서 선택되는 제4다이아몬드상 탄소 재료층을 형성하는 단계(여기서, 다이아몬드상 탄소 재료는 y원자%의 Si 또는 Ge으로 도프됨); 상기 제4층 위에 수소첨가 비정질 탄소, 비정질 탄소,비정질 다이아몬드 및 불화 다이아몬드상 탄소로 이루어지는 군에서 선택되는 제5다이아몬드상 탄소 재료층을 형성하는 단계(여기서, 다이아몬드상 탄소 재료는 z원자%의 Si또는 Ge으로 도프되고; 상기 v,w,x,y 및 z는 동일하거나 상이하며 약 0 내지 약 25범위임); 상기 도전성 영역의 선택된 영역들위에 개구들을 갖는 제1마스크를 상기 제5층 위에 형성하는 단계; 상기 제1마스크 및 상기 제5 내지 1층을 통해 에칭시키는 단계; 상기 제1마스크를 제거시키는 단계; 상기 도전성 영역 중 선택된 영역들을 상호 접속시키기 위한 상호 접속 패턴을 갖는 제2마스크를 상기 제5층 위에 형성하는 단계;상기 제2마스크 및 상기 제5및 4층을통해 에칭시키는 단계; 상기 제1 내지 5층 및 상기 제4 및 5층 중의 상기 개구들을 금속으로 충전시키는 단계를 포함하는, 도전성 영역을 포함하는 상부 표면을 갖는 기판 위에 상호 접속 구조를 형성하는 방법.
- 제21항에 있어서, 상기 v,w,x,y 및 z는 약 5 내지 약 15범위인 방법.
- 제21항에 있어서, 상기 제1금속 및 상기 제5층을 화학 기계적으로 폴리싱하여 평평한 상부 표면을 형성하는 단계를 추가로 포함하는 방법.
- 제21항에 있어서, 상기 다이아몬드상 탄소층 중 적어도 하나(그러나,모두는 아님)가 다른 유전 물질로 대체되는 방법.
- 제24항에 있어서, 상기 유전 무질이 이산화규소 또는 질화규소인 방법.
- 상부 표면을 갖는 기판을 선택하는 단계; 상기 기판의 상기 상부 표면 위에 v원자%의 Si 또는 Ge로 도프된 제1다이아몬드상 탄소층을 형성하는 단계(여기서, v는 약 0.1 내지 25임); 상기 제1층 위에 제2다이아몬드상 탄소층을 형성하는 단계; 상기 제2층 위에 패턴화층을 형성하는 단계; O2함유 기체를 도입하는 단계; 상기 패턴화층을 통해 노출된 상기 제2층을 반응성 이온 에칭시키는 단계; 및 상기 제1층을 통해 에칭되기 전에 반응성 이온 에칭 단계를 정지시키는 단계를 포함하는 다이아몬드상 탄소의 선택적 에칭 방법.
- 제26항에 있어서, v가 약 5 내지 약 15인 방법.
- 상부 표면을 갖는 기판을 선택하는 단계; 상기 기판의 상기 상부 표면 위에 다이아몬드상 탄소 재료층을 형성하는 단계; 상기 탄소 재료층 위에 SiO2층 위에 패턴화층을 형성하는 단계;불소 함유 기체를 도입하는 단계; 상기 패턴화층을 통해노출된 상기 SiO2층을 반응성 이온 에칭시키는 단계; 상기 다이아몬드상 탄소 재료층을 통해 에칭되기 전에 상기 반응성 이온 에칭단계를 정지시키는 단계를 포함하는 SiO2에 패턴을 형성하는 방법.
- 제28항에 있어서, 상기 불소 함유 기체가 CF4를 포함하는 것인 방법.
- 제28항에 있어서, 불화 비정질 탄소 재료가 수소첨가 비정질 탄소, 비정질 탄소, 비정질 다이아몬드, 수소첨가된 불화 비정질 탄소 및 불화 비정질 다이아몬드로 이루어지는 군에서 선택되는 것인 방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
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- 1995-06-14 EP EP95109200A patent/EP0696819A1/en not_active Withdrawn
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- 1995-08-10 TW TW084108335A patent/TW275136B/zh not_active IP Right Cessation
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KR100337580B1 (ko) * | 1996-12-02 | 2002-10-11 | 닛본 덴기 가부시끼가이샤 | 반도체장치및그제조방법 |
KR100356476B1 (ko) * | 1999-12-29 | 2002-10-18 | 주식회사 하이닉스반도체 | 반도체 소자의 다마신 공정에서 금속층간 절연막 형성 방법 |
Also Published As
Publication number | Publication date |
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TW275136B (ko) | 1996-05-01 |
EP0696819A1 (en) | 1996-02-14 |
JPH0864591A (ja) | 1996-03-08 |
US5674355A (en) | 1997-10-07 |
US5559367A (en) | 1996-09-24 |
US5679269A (en) | 1997-10-21 |
JP3184746B2 (ja) | 2001-07-09 |
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