KR960026728A - 직접회로에서의 금속배선 제조방법 - Google Patents
직접회로에서의 금속배선 제조방법 Download PDFInfo
- Publication number
- KR960026728A KR960026728A KR1019940034159A KR19940034159A KR960026728A KR 960026728 A KR960026728 A KR 960026728A KR 1019940034159 A KR1019940034159 A KR 1019940034159A KR 19940034159 A KR19940034159 A KR 19940034159A KR 960026728 A KR960026728 A KR 960026728A
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- South Korea
- Prior art keywords
- wiring
- kpa
- tiw
- aluminum
- film
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53219—Aluminium alloys
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
미세전자회로에서 알루미늄 배선은 사용도중 전자이주(eletro-migration)과 응력절단(stress voiding)에 의해 전달된다.
특히, 회로의 집적도가 높아짐에 따라 배선폭은 줄어들게 되어 전자이주나 응력절단에 의한 절단은 더욱 심각하게 된다.
본 발명은 알루미늄 배선을 Ti로 증착하고,열처리를 통한 배선표면의 Al3Ti 완층막을 형성시킨후 건식식각의 선택성을 이용하여 배선 사이의 Ti만을 식각함으로써 배선의 윗면 뿐만 아니라 측벽에도 Al3Ti 완층막을 갖는 배선구조를 제조한다.
본 발명은 추가되는 마스크의 사용없이 알루미늄 배선의 윗면, 아랫면 및 측면에 대한 Al3Ti 완층막을 형성시켜 금속 배선의 신뢰성 증대를 가능하게 한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도의 (a) 내지 (e)는 본 발명에 따른 금속배선의 제조방법.
Claims (1)
- 규소 산화막 위에,각각, 100∼1000Å, 200∼2000Å, 2000∼10000Å, 300∼2000Å 및, 200∼2000Å 정도의 두께로, Ti(3), TiN(TiN/Ti, Tiw, 또는 Tiw/Ti)(4), Al(Al-Si 합금이나 Al-Si-Cu합금)(5), Ti(Tiw)(6) 및 TiN(TiW)(7)을 차례로 증착하는 공정과; 배선 식각 공정이 끝난 웨이퍼를 RF 스퍼터로 약 30초∼10분 동안 세척하여 배선 측면의 알루미늄 산화막을 완전히 제거한후 진공속에서 그대로 Ti(8)을 약 200∼2000A 정도의 두께로 증착하는 공정과; Ti(8)가 증착된 웨이퍼를 진공중이나 질소가스 분위기 또는 대기 중에서 그리고 약 300∼600℃의 온도에서, 1분 내지 90분동안 열처리하여 배선의 측면과 윗면에 Al3Ti(9)를 형성하는 공정과; 웨이퍼를 SF6혹은 CF4혹은 이들의 혼합가스 분위기나 H2O2 용액에서 Ti를 선택적으로 식각하여 알루미늄 배선의 윗면 및 측면을 덮은 Al2Ti막(9)을 그대로 남기고 알루미늄 배선 사이의 Ti를 제거하는 공정과; 알루미늄 배선을 둘러 싸고 있는 Al3Ti막(9)을 공기중에 노출시켜 그것의 표면을 산화시키는 공정을 포함하는 직접회로에서의 금속배선 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940034159A KR0138864B1 (ko) | 1994-12-14 | 1994-12-14 | 직접회로에서의 금속배선 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940034159A KR0138864B1 (ko) | 1994-12-14 | 1994-12-14 | 직접회로에서의 금속배선 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960026728A true KR960026728A (ko) | 1996-07-22 |
KR0138864B1 KR0138864B1 (ko) | 1998-04-27 |
Family
ID=19401448
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019940034159A KR0138864B1 (ko) | 1994-12-14 | 1994-12-14 | 직접회로에서의 금속배선 제조방법 |
Country Status (1)
Country | Link |
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KR (1) | KR0138864B1 (ko) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100505059B1 (ko) * | 1998-08-08 | 2005-11-30 | 삼성전자주식회사 | 셀리사이드 공정에서의 산화막 제거방법 |
KR20050009877A (ko) * | 2003-07-18 | 2005-01-26 | 주식회사 하이닉스반도체 | 반도체 소자의 알루미늄 배선 형성방법 |
KR20160115055A (ko) | 2015-03-25 | 2016-10-06 | 주식회사 싸이텍 | 파리 및 애벌레 먹이제조장치 |
-
1994
- 1994-12-14 KR KR1019940034159A patent/KR0138864B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
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KR0138864B1 (ko) | 1998-04-27 |
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