KR950021772A - 적어도 하나의 모오스(mos) 트랜지스터를 구비한 집적회로의 제조방법 - Google Patents

적어도 하나의 모오스(mos) 트랜지스터를 구비한 집적회로의 제조방법 Download PDF

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Publication number
KR950021772A
KR950021772A KR1019940032395A KR19940032395A KR950021772A KR 950021772 A KR950021772 A KR 950021772A KR 1019940032395 A KR1019940032395 A KR 1019940032395A KR 19940032395 A KR19940032395 A KR 19940032395A KR 950021772 A KR950021772 A KR 950021772A
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KR
South Korea
Prior art keywords
doped layer
applying
doped
integrated circuit
source terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1019940032395A
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English (en)
Korean (ko)
Inventor
로타르 리쉬
토마스 포겔장
프란쯔 호프만
카를 호프만
Original Assignee
발도르프, 음케
지멘스 악티엔게젤샤프트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 발도르프, 음케, 지멘스 악티엔게젤샤프트 filed Critical 발도르프, 음케
Publication of KR950021772A publication Critical patent/KR950021772A/ko
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/025—Manufacture or treatment of FETs having insulated gates [IGFET] of vertical IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/63—Vertical IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/837—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] comprising vertical IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
KR1019940032395A 1993-12-01 1994-12-01 적어도 하나의 모오스(mos) 트랜지스터를 구비한 집적회로의 제조방법 Ceased KR950021772A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DEP4340967.9 1993-12-01
DE4340967A DE4340967C1 (de) 1993-12-01 1993-12-01 Verfahren zur Herstellung einer integrierten Schaltungsanordnung mit mindestens einem MOS-Transistor

Publications (1)

Publication Number Publication Date
KR950021772A true KR950021772A (ko) 1995-07-26

Family

ID=6503928

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940032395A Ceased KR950021772A (ko) 1993-12-01 1994-12-01 적어도 하나의 모오스(mos) 트랜지스터를 구비한 집적회로의 제조방법

Country Status (6)

Country Link
US (1) US5443992A (enExample)
EP (1) EP0656647B1 (enExample)
JP (1) JP3851360B2 (enExample)
KR (1) KR950021772A (enExample)
DE (2) DE4340967C1 (enExample)
TW (1) TW274635B (enExample)

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ATE269588T1 (de) * 1993-02-04 2004-07-15 Cornell Res Foundation Inc Mikrostrukturen und einzelmask, einkristall- herstellungsverfahren
DE4417150C2 (de) * 1994-05-17 1996-03-14 Siemens Ag Verfahren zur Herstellung einer Anordnung mit selbstverstärkenden dynamischen MOS-Transistorspeicherzellen
US5872374A (en) * 1996-03-29 1999-02-16 Motorola, Inc. Vertical semiconductor device
US5929476A (en) 1996-06-21 1999-07-27 Prall; Kirk Semiconductor-on-insulator transistor and memory circuitry employing semiconductor-on-insulator transistors
DE19653107C2 (de) * 1996-12-19 1998-10-08 Siemens Ag Verfahren zur Herstellung einer Speicherzellenanordnung
DE19711482C2 (de) * 1997-03-19 1999-01-07 Siemens Ag Verfahren zur Herstellung eines vertikalen MOS-Transistors
US5864158A (en) * 1997-04-04 1999-01-26 Advanced Micro Devices, Inc. Trench-gated vertical CMOS device
US6150687A (en) 1997-07-08 2000-11-21 Micron Technology, Inc. Memory cell having a vertical transistor with buried source/drain and dual gates
US6191470B1 (en) 1997-07-08 2001-02-20 Micron Technology, Inc. Semiconductor-on-insulator memory cell with buried word and body lines
US6072209A (en) 1997-07-08 2000-06-06 Micro Technology, Inc. Four F2 folded bit line DRAM cell structure having buried bit and word lines
US5907170A (en) 1997-10-06 1999-05-25 Micron Technology, Inc. Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor
US6528837B2 (en) * 1997-10-06 2003-03-04 Micron Technology, Inc. Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor
US6066869A (en) 1997-10-06 2000-05-23 Micron Technology, Inc. Circuit and method for a folded bit line memory cell with vertical transistor and trench capacitor
US6069390A (en) 1998-01-15 2000-05-30 International Business Machines Corporation Semiconductor integrated circuits with mesas
US6177299B1 (en) 1998-01-15 2001-01-23 International Business Machines Corporation Transistor having substantially isolated body and method of making the same
US6025225A (en) 1998-01-22 2000-02-15 Micron Technology, Inc. Circuits with a trench capacitor having micro-roughened semiconductor surfaces and methods for forming the same
US6242775B1 (en) * 1998-02-24 2001-06-05 Micron Technology, Inc. Circuits and methods using vertical complementary transistors
US6304483B1 (en) 1998-02-24 2001-10-16 Micron Technology, Inc. Circuits and methods for a static random access memory using vertical transistors
US6097242A (en) 1998-02-26 2000-08-01 Micron Technology, Inc. Threshold voltage compensation circuits for low voltage and low power CMOS integrated circuits
US6124729A (en) 1998-02-27 2000-09-26 Micron Technology, Inc. Field programmable logic arrays with vertical transistors
US5991225A (en) 1998-02-27 1999-11-23 Micron Technology, Inc. Programmable memory address decode array with vertical transistors
US6492232B1 (en) 1998-06-15 2002-12-10 Motorola, Inc. Method of manufacturing vertical semiconductor device
US6134175A (en) 1998-08-04 2000-10-17 Micron Technology, Inc. Memory address decode array with vertical transistors
US6208164B1 (en) 1998-08-04 2001-03-27 Micron Technology, Inc. Programmable logic array with vertical transistors
US6500744B2 (en) 1999-09-02 2002-12-31 Micron Technology, Inc. Methods of forming DRAM assemblies, transistor devices, and openings in substrates
KR100422412B1 (ko) * 2001-12-20 2004-03-11 동부전자 주식회사 수직 실리콘-온-인슐레이터 구조의 원통형 트랜지스터 및그 제조 방법
US7071519B2 (en) * 2003-01-08 2006-07-04 Texas Instruments Incorporated Control of high-k gate dielectric film composition profile for property optimization
US6913959B2 (en) * 2003-06-23 2005-07-05 Advanced Micro Devices, Inc. Method of manufacturing a semiconductor device having a MESA structure
US8618600B2 (en) * 2008-06-09 2013-12-31 Qimonda Ag Integrated circuit including a buried wiring line
CN109326595B (zh) 2017-07-31 2021-03-09 联华电子股份有限公司 半导体元件及其制作方法
CN116230763B (zh) * 2022-03-18 2024-03-15 北京超弦存储器研究院 Mos管、存储器及其制作方法
WO2023173679A1 (zh) * 2022-03-18 2023-09-21 北京超弦存储器研究院 晶体管及其制作方法、存储器、电子设备

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US4412868A (en) * 1981-12-23 1983-11-01 General Electric Company Method of making integrated circuits utilizing ion implantation and selective epitaxial growth
DE3380377D1 (en) * 1982-06-24 1989-09-14 Harris Semiconductor Patents Vertical igfet device and method for fabricating same
US4740826A (en) * 1985-09-25 1988-04-26 Texas Instruments Incorporated Vertical inverter
US4788158A (en) * 1985-09-25 1988-11-29 Texas Instruments Incorporated Method of making vertical inverter
US4824797A (en) * 1985-10-31 1989-04-25 International Business Machines Corporation Self-aligned channel stop
US5072276A (en) * 1986-10-08 1991-12-10 Texas Instruments Incorporated Elevated CMOS
US5164325A (en) * 1987-10-08 1992-11-17 Siliconix Incorporated Method of making a vertical current flow field effect transistor
US4992838A (en) * 1988-02-29 1991-02-12 Texas Instruments Incorporated Vertical MOS transistor with threshold voltage adjustment
US4942445A (en) * 1988-07-05 1990-07-17 General Electric Company Lateral depletion mode tyristor
US4951102A (en) * 1988-08-24 1990-08-21 Harris Corporation Trench gate VCMOS
JPH0266969A (ja) * 1988-08-31 1990-03-07 Nec Corp 半導体集積回路装置
US4994871A (en) * 1988-12-02 1991-02-19 General Electric Company Insulated gate bipolar transistor with improved latch-up current level and safe operating area
MY107475A (en) * 1990-05-31 1995-12-30 Canon Kk Semiconductor device and method for producing the same.
US5240865A (en) * 1990-07-30 1993-08-31 Texas Instruments Incorporated Method of forming a thyristor on an SOI substrate

Also Published As

Publication number Publication date
TW274635B (enExample) 1996-04-21
JP3851360B2 (ja) 2006-11-29
DE4340967C1 (de) 1994-10-27
DE59407691D1 (de) 1999-03-04
EP0656647A1 (de) 1995-06-07
EP0656647B1 (de) 1999-01-20
US5443992A (en) 1995-08-22
JPH07202216A (ja) 1995-08-04

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