KR950021772A - 적어도 하나의 모오스(mos) 트랜지스터를 구비한 집적회로의 제조방법 - Google Patents
적어도 하나의 모오스(mos) 트랜지스터를 구비한 집적회로의 제조방법 Download PDFInfo
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- KR950021772A KR950021772A KR1019940032395A KR19940032395A KR950021772A KR 950021772 A KR950021772 A KR 950021772A KR 1019940032395 A KR1019940032395 A KR 1019940032395A KR 19940032395 A KR19940032395 A KR 19940032395A KR 950021772 A KR950021772 A KR 950021772A
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- 238000004519 manufacturing process Methods 0.000 title claims 8
- 239000000758 substrate Substances 0.000 claims abstract 2
- 238000000034 method Methods 0.000 claims 13
- 238000000407 epitaxy Methods 0.000 claims 3
- 238000001451 molecular beam epitaxy Methods 0.000 claims 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 2
- 229920005591 polysilicon Polymers 0.000 claims 2
- 239000000463 material Substances 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66666—Vertical transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
Abstract
절연층은 소오스 단자영역을 포함하는 기판의 기본표면상에 성장한다. 소오스 단자영역의 표면이 특히 도포되지않은 제1개구부는 절연층에 제공된다. 적어도 MOS트랜지시터에 대한 드레인영역과 채널영역을 포함하는 연속한 수직층은 도핑에서 반도체 물질의 에피텍시 성장에 의하여 제1개국부에 만들어진다. 드레인영역과 채널영역의 두께의 합과 일치하는 깊이를 가지는 제2개구부는 층 구조로 만들어지며 게이트 유전체는 그의 표면에 인가되고 게이트 전극은 상기 게이트유전체에 인가된다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 층구조를 나타낸 수직MOS 트랜지시터를 도시한 도면.
제4도는 수직MOS트랜지스터에서의 정면도.
제5도는 층구조에 나타낸 수직 인버터를 도시한 도면.
Claims (11)
- 적어도 하나의 모오스 트랜지시터를 구비한 집적회로의 제조방법에 있어서, 기판상에 소오스 단자영역을 만드는 단계; 소오스 단자영역상에 제1절연층을 인가하는 단계; 소오스 단자영역의 표면을 노출하는 제1절연층에 제1개구부를 제공하는 단계; 소오스 단자영역의 표면상에 제1도핑층을 인가하는 단계; 제1도핑층상에 제2도핑층을 인가하는 단계; 제2도핑층상에 제3도핑층을 인가하는 단계; 제1도핑층으로 연장한 제3도핑층에 위치한 제2개구부를 제공하는 단계; 제2개구부의 표면내측에 유전체를 인가하는 단계; 게이트 전극을 형성하기 위하여 도핑된 폴리실리콘으로 제2개구부를 충전하는 단계; 도핑된 폴리실리콘에 제2절연층을 인가하는 단계; 전기접속을 제3도핑층에 제공하는 단계; 전기접속을 게이트전극에 제공하는 단계; 전기접속을 소오스 단자영역에 제공하는 단계를 포함하는 것을 특징으로 하는 적어도 하나의 모오스 트랜지시터를 구비한 집적회로의 제조방법.
- 제1항에 있어서, 제3도핑층을 인가하는 단계는, 제3도핑층의 상부표면이 제1절연층의 표면에서 평평하게 되도록 더 높은 부분에 제3도핑층을 인가하는 단계를 포함하는 것을 특징으로 하는 적어도 하나의 모오스 트랜지시터를 구비한 집적회로의 제조방법.
- 제1항에 있어서, 소오스 단자영역을 만드는 단계는 도핑된 웰의 형상을 포함하는 것을 특징으로 하는 적어도 하나의 모오스 트랜지시터를 구비한 집적회로의 제조방법.
- 제3항에 있어서, 소오스 단자영역을 만드는 단계는 연속한 도핑층의 형상을 포함하는 것을 특징으로 하는 적어도 하나의 모오스 트랜지시터를 구비한 집적회로의 제조방법.
- 제1항에 있어서, 제1, 제2 및 제3도핑층을 인가하는 단계는 분자 빔 에피텍시를 통하여 도핑된 층을 인가하는 단계를 포함하는 것을 특징으로 하는 적어도 하나의 모오스 트랜지시터를 구비한 집적회로의 제조방법.
- 제5항에 있어서, 제1, 제2 및 제3도핑층을 인가하는 단계는 선택적 에피텍시를 통하여 도핑된 층을 인가하는 단계를 포함하는 것을 특징으로 하는 적어도 하나의 모오스 트랜지시터를 구비한 집적회로의 제조방법.
- 제5항에 있어서, 분자 빔 에피텍시를 통하여 도핑층을 인가하는 단계는 400에서 700℃의 온도범위와 0.1에서 10mbar의 입력범위에서 실행되는 것을 특징으로 하는 적어도 하나의 모오스 트랜지시터를 구비한 집적회로의 제조방법.
- 제6항에 있어서, 선택적 에피텍시를 통하여 도핑층을 인가하는 단계는 SiH2Cl2에 대한 RTP-CVD에 의하여 실행되는 것을 특징으로 하는 적어도 하나의 모오스 트랜지시터를 구비한 집적회로의 제조방법.
- 제6항에 있어서, 선택적 에피텍시를 통하여 도핑층을 인가하는 단계는 SiH2에 대한 RTP-CVD에 의하여 실행되는 것을 특징으로 하는 적어도 하나의 모오스 트랜지시터를 구비한 집적회로의 제조방법.
- 제1항에 있어서, 제1도핑층은 제2도핑층의 극성과는 반대 극성을 가지는 것을 특징으로 하는 적어도 하나의 모오스 트랜지시터를 구비한 집적회로의 제조방법.
- ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE4340967A DE4340967C1 (de) | 1993-12-01 | 1993-12-01 | Verfahren zur Herstellung einer integrierten Schaltungsanordnung mit mindestens einem MOS-Transistor |
DEP4340967.9 | 1993-12-01 |
Publications (1)
Publication Number | Publication Date |
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KR950021772A true KR950021772A (ko) | 1995-07-26 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019940032395A KR950021772A (ko) | 1993-12-01 | 1994-12-01 | 적어도 하나의 모오스(mos) 트랜지스터를 구비한 집적회로의 제조방법 |
Country Status (6)
Country | Link |
---|---|
US (1) | US5443992A (ko) |
EP (1) | EP0656647B1 (ko) |
JP (1) | JP3851360B2 (ko) |
KR (1) | KR950021772A (ko) |
DE (2) | DE4340967C1 (ko) |
TW (1) | TW274635B (ko) |
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ATE269588T1 (de) * | 1993-02-04 | 2004-07-15 | Cornell Res Foundation Inc | Mikrostrukturen und einzelmask, einkristall- herstellungsverfahren |
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DE19653107C2 (de) * | 1996-12-19 | 1998-10-08 | Siemens Ag | Verfahren zur Herstellung einer Speicherzellenanordnung |
DE19711482C2 (de) * | 1997-03-19 | 1999-01-07 | Siemens Ag | Verfahren zur Herstellung eines vertikalen MOS-Transistors |
US5864158A (en) * | 1997-04-04 | 1999-01-26 | Advanced Micro Devices, Inc. | Trench-gated vertical CMOS device |
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US5907170A (en) | 1997-10-06 | 1999-05-25 | Micron Technology, Inc. | Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor |
US6528837B2 (en) * | 1997-10-06 | 2003-03-04 | Micron Technology, Inc. | Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor |
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KR100422412B1 (ko) * | 2001-12-20 | 2004-03-11 | 동부전자 주식회사 | 수직 실리콘-온-인슐레이터 구조의 원통형 트랜지스터 및그 제조 방법 |
US7071519B2 (en) * | 2003-01-08 | 2006-07-04 | Texas Instruments Incorporated | Control of high-k gate dielectric film composition profile for property optimization |
US6913959B2 (en) * | 2003-06-23 | 2005-07-05 | Advanced Micro Devices, Inc. | Method of manufacturing a semiconductor device having a MESA structure |
US8618600B2 (en) * | 2008-06-09 | 2013-12-31 | Qimonda Ag | Integrated circuit including a buried wiring line |
CN109326595B (zh) | 2017-07-31 | 2021-03-09 | 联华电子股份有限公司 | 半导体元件及其制作方法 |
WO2023173679A1 (zh) * | 2022-03-18 | 2023-09-21 | 北京超弦存储器研究院 | 晶体管及其制作方法、存储器、电子设备 |
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-
1993
- 1993-12-01 DE DE4340967A patent/DE4340967C1/de not_active Expired - Fee Related
-
1994
- 1994-10-15 TW TW083109590A patent/TW274635B/zh not_active IP Right Cessation
- 1994-11-01 US US08/332,733 patent/US5443992A/en not_active Expired - Lifetime
- 1994-11-09 EP EP94117699A patent/EP0656647B1/de not_active Expired - Lifetime
- 1994-11-09 DE DE59407691T patent/DE59407691D1/de not_active Expired - Lifetime
- 1994-11-30 JP JP32172394A patent/JP3851360B2/ja not_active Expired - Lifetime
- 1994-12-01 KR KR1019940032395A patent/KR950021772A/ko not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
DE4340967C1 (de) | 1994-10-27 |
US5443992A (en) | 1995-08-22 |
DE59407691D1 (de) | 1999-03-04 |
TW274635B (ko) | 1996-04-21 |
EP0656647B1 (de) | 1999-01-20 |
JP3851360B2 (ja) | 2006-11-29 |
JPH07202216A (ja) | 1995-08-04 |
EP0656647A1 (de) | 1995-06-07 |
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