KR950003233B1 - 이중층 실리사이드 구조를 갖는 반도체 장치 및 그 제조방법 - Google Patents

이중층 실리사이드 구조를 갖는 반도체 장치 및 그 제조방법 Download PDF

Info

Publication number
KR950003233B1
KR950003233B1 KR1019920009414A KR920009414A KR950003233B1 KR 950003233 B1 KR950003233 B1 KR 950003233B1 KR 1019920009414 A KR1019920009414 A KR 1019920009414A KR 920009414 A KR920009414 A KR 920009414A KR 950003233 B1 KR950003233 B1 KR 950003233B1
Authority
KR
South Korea
Prior art keywords
silicide
temperature
metal
layer
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR1019920009414A
Other languages
English (en)
Korean (ko)
Other versions
KR930024089A (ko
Inventor
백수현
최진석
Original Assignee
삼성전자 주식회사
김광호
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사, 김광호 filed Critical 삼성전자 주식회사
Priority to KR1019920009414A priority Critical patent/KR950003233B1/ko
Priority to US08/068,708 priority patent/US6774023B1/en
Priority to RU93005343A priority patent/RU2113034C1/ru
Priority to CN93106512A priority patent/CN1034198C/zh
Priority to JP5128658A priority patent/JP2503187B2/ja
Priority to EP93304216A priority patent/EP0573241B1/en
Publication of KR930024089A publication Critical patent/KR930024089A/ko
Application granted granted Critical
Publication of KR950003233B1 publication Critical patent/KR950003233B1/ko
Priority to CN95109584A priority patent/CN1076866C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H10D64/01308—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
    • H10D64/0131—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4451—Semiconductor materials, e.g. polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/412—Deposition of metallic or metal-silicide materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/30—Diffusion for doping of conductive or resistive layers
    • H10P32/302—Doping polycrystalline silicon or amorphous silicon layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/064—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying
    • H10W20/066—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying by forming silicides of refractory metals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1019920009414A 1992-05-30 1992-05-30 이중층 실리사이드 구조를 갖는 반도체 장치 및 그 제조방법 Expired - Lifetime KR950003233B1 (ko)

Priority Applications (7)

Application Number Priority Date Filing Date Title
KR1019920009414A KR950003233B1 (ko) 1992-05-30 1992-05-30 이중층 실리사이드 구조를 갖는 반도체 장치 및 그 제조방법
US08/068,708 US6774023B1 (en) 1992-05-30 1993-05-28 Method of manufacturing a semiconductor device having a multilayer structure including a dual-layer silicide
RU93005343A RU2113034C1 (ru) 1992-05-30 1993-05-28 Полупроводниковое устройство, обладающее двухслойной силицидной структурой и способы его изготовления /варианты/
CN93106512A CN1034198C (zh) 1992-05-30 1993-05-29 具双层硅化物结构的半导体器件
JP5128658A JP2503187B2 (ja) 1992-05-30 1993-05-31 二重シリサイド層配線をもつ半導体装置の製造方法
EP93304216A EP0573241B1 (en) 1992-05-30 1993-06-01 Semiconductor devices with a double layered silicide structure and process of making it
CN95109584A CN1076866C (zh) 1992-05-30 1995-10-31 在多晶硅层表面上的高熔点金属硅化物层的制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920009414A KR950003233B1 (ko) 1992-05-30 1992-05-30 이중층 실리사이드 구조를 갖는 반도체 장치 및 그 제조방법

Publications (2)

Publication Number Publication Date
KR930024089A KR930024089A (ko) 1993-12-21
KR950003233B1 true KR950003233B1 (ko) 1995-04-06

Family

ID=19333972

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920009414A Expired - Lifetime KR950003233B1 (ko) 1992-05-30 1992-05-30 이중층 실리사이드 구조를 갖는 반도체 장치 및 그 제조방법

Country Status (6)

Country Link
US (1) US6774023B1 (https=)
EP (1) EP0573241B1 (https=)
JP (1) JP2503187B2 (https=)
KR (1) KR950003233B1 (https=)
CN (2) CN1034198C (https=)
RU (1) RU2113034C1 (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6156630A (en) * 1997-08-22 2000-12-05 Micron Technology, Inc. Titanium boride gate electrode and interconnect and methods regarding same
SE515783C2 (sv) * 1997-09-11 2001-10-08 Ericsson Telefon Ab L M Elektriska anordningar jämte förfarande för deras tillverkning
US7282443B2 (en) * 2003-06-26 2007-10-16 Micron Technology, Inc. Methods of forming metal silicide
US7112483B2 (en) * 2003-08-29 2006-09-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming a device having multiple silicide types
US7105440B2 (en) * 2005-01-13 2006-09-12 International Business Machines Corporation Self-forming metal silicide gate for CMOS devices
US20100052072A1 (en) * 2008-08-28 2010-03-04 Taiwan Semiconductor Manufacturing Company, Ltd. Dual gate structure on a same chip for high-k metal gate technology
RU2405228C2 (ru) * 2008-12-15 2010-11-27 Белорусский государственный университет Способ формирования силицидов металлов
US8652914B2 (en) 2011-03-03 2014-02-18 International Business Machines Corporation Two-step silicide formation
CN105541337B (zh) * 2015-12-25 2017-12-08 中国科学院上海硅酸盐研究所 一种多金属硅化物粉体及其制备方法
US9837357B1 (en) 2017-02-06 2017-12-05 International Business Machines Corporation Method to reduce variability in contact resistance
TW202429576A (zh) * 2023-01-05 2024-07-16 美商應用材料股份有限公司 藉由鉬與鈦的整合之觸點電阻降低

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4180596A (en) * 1977-06-30 1979-12-25 International Business Machines Corporation Method for providing a metal silicide layer on a substrate
US4285761A (en) * 1980-06-30 1981-08-25 International Business Machines Corporation Process for selectively forming refractory metal silicide layers on semiconductor devices
DE3326142A1 (de) * 1983-07-20 1985-01-31 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung mit einer aus aluminium oder aus einer aluminiumlegierung bestehenden aeusseren kontaktleiterbahnebene
JP2522924B2 (ja) * 1986-11-19 1996-08-07 三洋電機株式会社 金属シリサイド膜の形成方法
US4782380A (en) * 1987-01-22 1988-11-01 Advanced Micro Devices, Inc. Multilayer interconnection for integrated circuit structure having two or more conductive metal layers
US4974056A (en) * 1987-05-22 1990-11-27 International Business Machines Corporation Stacked metal silicide gate structure with barrier
JPS6417471A (en) * 1987-07-13 1989-01-20 Toshiba Corp Semiconductor device
JPS6417470A (en) * 1987-07-13 1989-01-20 Toshiba Corp Semiconductor device
JPH0234967A (ja) * 1988-07-25 1990-02-05 Sony Corp 半導体装置及び半導体装置の製造方法
JPH02262371A (ja) * 1989-04-03 1990-10-25 Toshiba Corp 半導体装置及びその製造方法
US5194405A (en) * 1989-07-06 1993-03-16 Sony Corporation Method of manufacturing a semiconductor device having a silicide layer
JP2616034B2 (ja) * 1989-08-23 1997-06-04 日本電気株式会社 半導体集積回路装置
US5203957A (en) * 1991-06-12 1993-04-20 Taiwan Semiconductor Manufacturing Company Contact sidewall tapering with argon sputtering

Also Published As

Publication number Publication date
JPH0637092A (ja) 1994-02-10
US6774023B1 (en) 2004-08-10
KR930024089A (ko) 1993-12-21
RU2113034C1 (ru) 1998-06-10
CN1076866C (zh) 2001-12-26
EP0573241A3 (https=) 1994-02-16
CN1034198C (zh) 1997-03-05
EP0573241A2 (en) 1993-12-08
CN1081283A (zh) 1994-01-26
JP2503187B2 (ja) 1996-06-05
EP0573241B1 (en) 2000-02-09
CN1121642A (zh) 1996-05-01

Similar Documents

Publication Publication Date Title
US5970370A (en) Manufacturing capping layer for the fabrication of cobalt salicide structures
JP2857006B2 (ja) Ｍｏｓ集積回路上の自己整列珪化コバルト
US6091152A (en) Semiconductor device and method for fabricating the same
KR950003233B1 (ko) 이중층 실리사이드 구조를 갖는 반도체 장치 및 그 제조방법
JP2720827B2 (ja) 半導体装置の製造方法
KR0161380B1 (ko) 반도체장치의 트랜지스터 및 그 제조방법
WO2000022659A1 (en) Method of forming cobalt-disilicide contacts using a cobalt-carbon alloy thin film
EP0100454B1 (en) Semiconductor device having a conductive layer consisting of a high-melting point metal silicide and a method for manufacturing such a semiconductor device
KR100264029B1 (ko) 티타늄 실리사이드막을 가진 반도체 장치 제조 방법
JPH0687501B2 (ja) 半導体装置のゲート電極の製造方法
KR950006974B1 (ko) 반도체장치의 제조방법
KR100370156B1 (ko) 반도체 소자의 제조방법
JPH04137621A (ja) 半導体装置の製造方法
KR100447992B1 (ko) 반도체소자의게이트전극형성방법
KR100458121B1 (ko) 반도체의 실리사이드 형성방법
KR100270185B1 (ko) 저저항 티타늄 실리사이드 층 형성 방법 및 그를 포함하는 반도체 디바이스
JP2003031522A (ja) 半導体素子の製造方法
JPH01276616A (ja) 半導体装置の製造方法
KR950000659B1 (ko) 실사이드 형성방법
KR960002065B1 (ko) 반도체장치의 제조방법
JP2650972B2 (ja) 半導体装置の製造方法
JPS61135156A (ja) 半導体装置およびその製造方法
KR100273272B1 (ko) 실리사이드제조방법
KR950000657B1 (ko) 반도체장치 및 제조방법
KR20010011553A (ko) 반도체 소자의 게이트 전극 형성 방법

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

G160 Decision to publish patent application
PG1605 Publication of application before grant of patent

St.27 status event code: A-2-2-Q10-Q13-nap-PG1605

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 11

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 12

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 13

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 14

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 15

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 16

FPAY Annual fee payment

Payment date: 20110405

Year of fee payment: 17

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 17

EXPY Expiration of term
PC1801 Expiration of term

St.27 status event code: N-4-6-H10-H14-oth-PC1801

Not in force date: 20120531

Ip right cessation event data comment text: Termination Category : EXPIRATION_OF_DURATION

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000