KR920001768A - 헤테로인터페이스를 가진 전계효과 트랜지스터 - Google Patents

헤테로인터페이스를 가진 전계효과 트랜지스터 Download PDF

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KR920001768A
KR920001768A KR1019910008789A KR910008789A KR920001768A KR 920001768 A KR920001768 A KR 920001768A KR 1019910008789 A KR1019910008789 A KR 1019910008789A KR 910008789 A KR910008789 A KR 910008789A KR 920001768 A KR920001768 A KR 920001768A
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안쏘니 킬리 필립
더블유. 테일러 제프리
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리챠드 데이빗 로우만
아메리칸 델리폰 앤드 텔레그라프 캄파니
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Abstract

내용 없음

Description

헤테로인터페이스를 가진 전계효과 트랜지스터
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 원리에 따른 p-채널 전계효과 트랜지스터의 정면 단면도
제2도및 제3도는 제1도에 도시된 전계효과 트랜지스터의 특정 실시예에 대한 에너지 밴드 다이어그램.

Claims (10)

  1. 제 2 및 제 3 반도체 영역(18)사이에 측방향으로 배치된 제 1 반도체 영역을 가진 전계효과 트랜지스터로서, 상기 제 1 반도체 영역은, 제 1 전도성 타입, 제 1 에너지 밴드갭, 제 1 도핑 농도를 가진 제 1 반도체 층(15)을 구비하며, 상기 제 2 및 제 3 반도체 영역(18)상에 도통 채널을 형성하는 제 2 반도체층(12)을 구비하며, 여기서 상기 제 2 및 제 3반도체 영역(18)은 각각 상기 제 1전도성 타입과 반대인 제 2 전도성 타입을 가지며, 상기 제2 반도체층(12)은 상기 제 2 전도성 타입 및 제 2 에너지 밴드 갭을 가지며, 상기 제 2 전도성 타입은상기 제 1 전도성 타입과 반대이며, 상기 제 1 에너지 밴드 갭은 상기 제 2에너지 밴드 갭보다 크고, 상기 제 1 및 제 2반도체층(15,12)은 제 1 헤테로 접합 인터페이스를 가져서 상기 도통 채널이 상기 제 1 헤테로접합 인터페이스 아래에 형성되며, 상기 제 1 반도체 층(15)내에 상기 제1 헤테로접합 인터페이스 근처에 형성된 전하 시트(14)를 구비하며, 상기 전하 시트는 상기 제 1 전도성 타입 및 상기 제 1 도핑 농도보다 상당히 큰 제 2도핑 농도를 가지며, 상기 제 1 전도성 타입 및 상기 제 1 에너지 밴드 갭과 사실상 동일한 제 3 에너지 밴드갭을 가진 제 3 반도체층(11)을 구비하며, 상기 제 2 및 제 3반도체 층은 인터페이스를 갖는 전계효과 트랜지스터.
  2. 제 2 및 제 3반도체 영역(18)사이에 측방향으로 배치된 제 1반도체 영역을 가진 전계효과 트랜지스터로서, 상기 제 1반도체 영역은, 제 1전도성 타입, 제 1에너지 밴드갭, 제 1도핑 농도를 가진 제 1 반도체 층(15)을 구비하며, 제 2전도성 타입 및 제 2에너지 밴드갭을 가진 제 2반도체 층(12)을 구비하며, 여기서 상기 제 2전도성타입은 상기 제 1 전도성 타입과 반대이고, 상기 제 1 에너지 밴드갭은 상기 제 2 에너지 밴드갭 보다 크며, 상기 제 2 에너지 밴드갭 보다 작은 제 3에너지 밴드갭을 가진 상기 제 2 반도체층(12)내에 형성된 양자우물(13)을 구비하며, 여기서 상기 양자 우물(13)은 상기 제 1 및 제 2 반도체 층(15,12)사이에 제 1 및 제 2헤테로접합 인터페이스를 각각 가지며, 상기 제 2 반도체 층(12)은 상기 양자우물(13)과 결합하여 상기 제 2 및 제 3 반도체 영역(18)사이에 도통 채널을 형성시켜서 상기 도통 채널이 상기 제1헤테로 접합 인터페이스 아래에 형성되며 상기 제 2 및 제 3 반도체 영역(18) 각각은 상기 제 2전도성 타입을 가지며, 상기 제 1 반도체층(15)내에 상기 제 1 헤테로접합 인터페이스 근처에 형성된 전하 시트(14)를 구비하며, 상기 전하 시트는 상기 제 1 전도성 타입 및 상기 제1도핑 농도보다 상당히 큰 제 2 도핑 농도를 가지며, 상기 제 1 전도성 타입 및 제 4에너지 밴드갭을 가진 제 3반도체 층(11)을 구비하며, 상기 제 4에너지 밴드 갭은 상기 제 1에너지 밴드갭과 사실상 동일하며, 상기 제 2 및 제 3반도체 층은 인터페이스를 갖는 전계효과 트랜지스터.
  3. 제 1항 또는 2항에 있어서, 상기 전하 시트 (14)는 상기 제 1헤테로접합 인터페이스로부터 100A이내에 있는 전계효과 트랜지스터.
  4. 제 3항에 있어서, 상기 전하 시트(14)는 대략 1017/㎤ 내지 1019/㎤ 범위내의 도핑 농도를 갖는 전계효과 트랜지스터.
  5. 제 4항에 있어서, 상기 제 2반도체 층(12)은 p-형 전도성 타입인 전계효과 트랜지스터.
  6. 제 5항에 있어서, 상기 전하 시트(14)는 대략 5×1018/㎤의 도너 도핑 농도를 갖는 전계효과 트랜지스터.
  7. 제6항에 있어서, 상기 제 1, 제 2 및 제 3반도체 영역(18)에 각각 접촉되는 제 1(21), 제 2(40) 및 제 3 (19)전기적 접촉부를 더 구비하는 전계효과 트랜지스터.
  8. 제 4항에 있어서, 상기 제 3 반도체 층(11)에 접촉되는 제 4 전기적 접촉부 (20)를 더 구비하는 전계효과 트랜지스터.
  9. 제8항에 있어서, 상기 제1, 제2 및 제3층(15,12,11)및 상기 양자우물(13)은 Ⅲ-Ⅴ족 반도체 또는 Ⅱ-Ⅳ족 반도체에서 선택되는 전계효과 트랜지스터.
  10. 제9항에 있어서, 상기 양자우물(13)은 InGaAs이며, 상기 제 1, 제 2, 제 3 반도체 층(15,12,11)은 AlGaAs인 전계효과 트랜지스터.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910008789A 1990-06-05 1991-05-29 헤테로 인터페이스를 가진 전계효과 트랜지스터 KR100204688B1 (ko)

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US07/533,636 US5111255A (en) 1990-06-05 1990-06-05 Buried channel heterojunction field effect transistor
US533,636 1990-06-05

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US (1) US5111255A (ko)
EP (1) EP0460793B1 (ko)
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CA (1) CA2039415C (ko)
DE (1) DE69102351T2 (ko)

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CA2039415A1 (en) 1991-12-06
US5111255A (en) 1992-05-05
DE69102351D1 (de) 1994-07-14
EP0460793B1 (en) 1994-06-08
KR100204688B1 (ko) 1999-07-01
DE69102351T2 (de) 1995-04-06
JP2500063B2 (ja) 1996-05-29
EP0460793A1 (en) 1991-12-11
CA2039415C (en) 1996-07-16
JPH04230042A (ja) 1992-08-19

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