KR900007757B1 - 반도체장치 및 그 제조방법 - Google Patents
반도체장치 및 그 제조방법 Download PDFInfo
- Publication number
- KR900007757B1 KR900007757B1 KR1019860010041A KR860010041A KR900007757B1 KR 900007757 B1 KR900007757 B1 KR 900007757B1 KR 1019860010041 A KR1019860010041 A KR 1019860010041A KR 860010041 A KR860010041 A KR 860010041A KR 900007757 B1 KR900007757 B1 KR 900007757B1
- Authority
- KR
- South Korea
- Prior art keywords
- film
- hole
- wiring
- insulating film
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02244—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of a metallic layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76888—By rendering at least a portion of the conductor non conductive, e.g. oxidation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61037785A JPS62194644A (ja) | 1986-02-20 | 1986-02-20 | 半導体装置およびその製造方法 |
| JP37785 | 1986-02-20 | ||
| JP61-37785 | 1986-02-20 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR870008388A KR870008388A (ko) | 1987-09-26 |
| KR900007757B1 true KR900007757B1 (ko) | 1990-10-19 |
Family
ID=12507140
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019860010041A Expired KR900007757B1 (ko) | 1986-02-20 | 1986-11-27 | 반도체장치 및 그 제조방법 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4884120A (enExample) |
| JP (1) | JPS62194644A (enExample) |
| KR (1) | KR900007757B1 (enExample) |
| DE (1) | DE3705152A1 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6482547A (en) * | 1987-09-24 | 1989-03-28 | Tadahiro Omi | Semiconductor device |
| US5252382A (en) * | 1991-09-03 | 1993-10-12 | Cornell Research Foundation, Inc. | Interconnect structures having patterned interfaces to minimize stress migration and related electromigration damages |
| DE4140330C1 (enExample) * | 1991-12-06 | 1993-03-18 | Texas Instruments Deutschland Gmbh, 8050 Freising, De | |
| US5371047A (en) * | 1992-10-30 | 1994-12-06 | International Business Machines Corporation | Chip interconnection having a breathable etch stop layer |
| US5679982A (en) * | 1993-02-24 | 1997-10-21 | Intel Corporation | Barrier against metal diffusion |
| US5897376A (en) * | 1993-09-20 | 1999-04-27 | Seiko Instruments Inc. | Method of manufacturing a semiconductor device having a reflection reducing film |
| US5439731A (en) * | 1994-03-11 | 1995-08-08 | Cornell Research Goundation, Inc. | Interconnect structures containing blocked segments to minimize stress migration and electromigration damage |
| JPH09205185A (ja) | 1996-01-26 | 1997-08-05 | Mitsubishi Electric Corp | 半導体装置および半導体装置の製造方法 |
| US12168115B2 (en) | 2016-10-21 | 2024-12-17 | Sanofi-Aventis Deutschland Gmbh | Liquid medicament administration device |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3866311A (en) * | 1971-06-14 | 1975-02-18 | Nat Semiconductor Corp | Method of providing electrically isolated overlapping metallic conductors |
| DE3109801A1 (de) * | 1981-03-13 | 1982-09-30 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von halbleiterbauelementen |
| JPS5955037A (ja) * | 1982-09-24 | 1984-03-29 | Hitachi Ltd | 半導体装置 |
| GB8316477D0 (en) * | 1983-06-16 | 1983-07-20 | Plessey Co Plc | Producing layered structure |
| JPS60234346A (ja) * | 1984-05-07 | 1985-11-21 | Nec Corp | 半導体装置 |
| JPS61280638A (ja) * | 1985-06-06 | 1986-12-11 | Toshiba Corp | 半導体装置の製造方法 |
| US4707457A (en) * | 1986-04-03 | 1987-11-17 | Advanced Micro Devices, Inc. | Method for making improved contact for integrated circuit structure |
| JP3480738B2 (ja) * | 1992-06-23 | 2003-12-22 | 株式会社東芝 | 情報処理装置における表示方法及び情報処理装置 |
-
1986
- 1986-02-20 JP JP61037785A patent/JPS62194644A/ja active Pending
- 1986-11-27 KR KR1019860010041A patent/KR900007757B1/ko not_active Expired
-
1987
- 1987-02-18 DE DE19873705152 patent/DE3705152A1/de active Granted
- 1987-02-20 US US07/016,787 patent/US4884120A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| DE3705152A1 (de) | 1987-08-27 |
| DE3705152C2 (enExample) | 1989-07-20 |
| KR870008388A (ko) | 1987-09-26 |
| US4884120A (en) | 1989-11-28 |
| JPS62194644A (ja) | 1987-08-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
|
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
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| R17-X000 | Change to representative recorded |
St.27 status event code: A-3-3-R10-R17-oth-X000 |
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| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
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| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
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| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
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| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
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| G160 | Decision to publish patent application | ||
| PG1605 | Publication of application before grant of patent |
St.27 status event code: A-2-2-Q10-Q13-nap-PG1605 |
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| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
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| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
St.27 status event code: A-2-4-F10-F11-exm-PR0701 |
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| PR1002 | Payment of registration fee |
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| PR1001 | Payment of annual fee |
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| FPAY | Annual fee payment |
Payment date: 19951018 Year of fee payment: 6 |
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| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 6 |
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| LAPS | Lapse due to unpaid annual fee | ||
| PC1903 | Unpaid annual fee |
St.27 status event code: A-4-4-U10-U13-oth-PC1903 Not in force date: 19961020 Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE |
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| PC1903 | Unpaid annual fee |
St.27 status event code: N-4-6-H10-H13-oth-PC1903 Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE Not in force date: 19961020 |
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| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-5-5-R10-R18-oth-X000 |
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| P22-X000 | Classification modified |
St.27 status event code: A-4-4-P10-P22-nap-X000 |
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| P22-X000 | Classification modified |
St.27 status event code: A-4-4-P10-P22-nap-X000 |