KR900007230B1 - 반도체 장치용 리드프레임 - Google Patents

반도체 장치용 리드프레임 Download PDF

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KR900007230B1
KR900007230B1 KR1019870008766A KR870008766A KR900007230B1 KR 900007230 B1 KR900007230 B1 KR 900007230B1 KR 1019870008766 A KR1019870008766 A KR 1019870008766A KR 870008766 A KR870008766 A KR 870008766A KR 900007230 B1 KR900007230 B1 KR 900007230B1
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lead frame
lead
resin
metal layer
mould
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KR880005678A (ko
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도시아끼 시노하마
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미쓰비시뎅끼 가부시끼가이샤
시기모리야
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Abstract

내용 없음.

Description

반도체 장치용 리드프래임
제 1 도∼제 3 도는 본 발명의 일실시예를 표시단 것으로서,
제 1 도는 러드프레임의 사시도.
제 2 도는 요부의 단면도.
제 3a 도, 제 3b 도는 수지봉지공정을 표시한 설명도.
제 4 도∼제 7 도는 이 종류의 종래의 리드프레임을 표시한 것으로서,
제 4 도는 사시도.
제 5 도∼제 7 도는 조립공정을 표시한 실명도.
* 도면의 주요부분에 대한 부호의 설명
1 : 타이 바 2 : 아우터리드
3 : 인너리드 4 : 다이패드
8 : 수지 13 : 납도금층
본 발명은 수지봉지형 반도체장치의 조립공정에 사용되는 리드프레임에 관한 것이다.
제 4 도는 종래의 직접회로의 조립공정에 사용되는 리드프레임을 표시한 것이고 얇은 금속조에서 에칭(etching)처리 또는 금형에 의한 뽑아내기에 의하여 소정의 패턴이 형성된다.
도면에 있어서 1은 아우터리드(2)간을 접속하는 타이 바(tie bar), 3은 봉지후 수지중에 들어가는 인너리드, 4는 칩을 올려놓는 다이패트(die pad)이다. 더우기 도면중 해칭(hatchipg)부는 칩의 정합 및 칩의 전극과 인너리드(3)간을 Au선등으로 접속을 용이하게 하기 위한 Au 표는 Ag의 도금부이다.
다음에 제 5 도는 다이패드(4)에 칩(5)이 정합되어 칩(5)의 전극과 인너리드(3)와의 사이의 전기적 접속을 얻기위한 Au선등의 세선(6)으보 접속된 공정을 표시한 것이다.
그후 제 6 도에 표시한 바와같이 리드프레임(11)을 몰드금형의 상형(9)과 하형(10) 사이에 삽입하고, 애폭시수지등의 열경화수지를 저압트랜스퍼 성형법에 의하여 캐비티내에 주입하여 수지(8)가 성형된다. 이 성형후의 프레임을 제 7 도에 표시한다. 더우기 도면중 12는 몰드금형과 프레임과의 간격에 수지가 유입하여 성현된 엷은막(이하 버리라고 한다)을 표시함.
이 버리는 금형의 평면정밀도, 리드프레임의 판두께의 편차 및 금형을 조여주는 프레스의 균일가압성, 봉지수지의 유동성, 프레임가공에 의한 새그등에 의하여 반생하고 이대로는 위의 공정의 아우리리드의 도금이 부착하지않는 결점이있으므로 몰드성형후 건식호닝이나 습식호닝등에 의하여 버리를 제거하여왔다. 또 전해버리제거후 고수압에 의한 버리제거방법등도 채용되어왔다.
종래의 리드프레임은 상기한 바와같이 구성되지반, 이 경우 상기와같은 버리제거작업은 원래는 불필요한 공정이고 호닝을 사용한경우 버리와 동시에 패키지도 동싱 손상을 받아 리드프레임도 표면이 거칠어짐, 가느러짐을 발생하여 도금 침상 석출을 반생시키거나, 리드강도를 약하게하는 등의 결점이 있었다.
또한 전해와 고수압에 의한 버리제거방법은 두꺼운 버리라 발생한 경우에는 완전하게 제거할 수 없는 결점이 있었다.
또 상기와같은 버리제거설비 및 작업에 의하여 제품의 가격을 연상시키는 요인이 되었다.
본 발명은 상기와같은 문제점올 해소하기 위하여 창안된 것으로서 수지봉지공정에 있어 버리의 완성을 최소한으로 억제하고 특별히 버리제거설비 및 공정을 필요없게하고 수지 리드에 손상을 부여하지 않게 하는것올 목적으로한 것이다.
본 발명에 의한 리드프레임은 봉지수지의 외측의 아우터리드 및 타이 바부에 납등의 엷은막 금속층을 설치한 것이다. '
본 발명에서 엷은막 금속층은 칩의 접합시에 칩의 전극과 인너리드를 전기적으로 접속하기 위한 세선접속시 및 수지봉지공정에 있어 온도에 의하여서도 용융되지않고 더우기 몰드공정에 있어서 금형으로 리드프레임을 조일때, 정도가 낮기때문에 변형하여 금형과 리드프레임과의 간격을 없이하여 버리의 발생을 방지한다.
이하 본 발명의 일실시예를 도면에 따라 설명한다. 제 1 도는 본 발명의 리드프레임을 표시한 것으로서, 13은 납도금부분이고, 패키지(수지)의 외측에서 타이 바(2)를 약간 넘어서는 부분까지 리드프레임과 표리및 측면에 실시되어있다.
이 범위는 통상 최종제품으로 가공된때 남은 부분으로 버리가 나오는 범위가 설정된다.
더우기 이 도금두께는 금형, 리드프레임의 치수정밀도, 프레스의 금형형체압력동에도 원인이 있지만 통상5μ∼10μ의 범위로 부착된다.
이 납도금은 다이패드부(4) 및 인너리드(3)의 선단에 부착되는 Ag 또는 Au도금의 공정에서 동시처리에 의하여 용이하게 얻어지는 것이다.
이 리드프레임을 사용하여 다이패드(4)상에 칩의 접합을 실시하고 칩의 전극과 인너리드간을 세선으로 접속한다. 칩의 접합온도는 수지접합을 할경우 약 2001C 또 세선의 접합온도는 250℃부근이다.
또 수지봉지시의 금형온도는 약 180℃이다. 더욱 납도금의 융점은 327℃이고 조립공정중에 용융하는 일은없다.
다음에 제 2 도는 수지봉지공정을 표시한 것으로 134은 납도금층을 표시하고, 리드프레임(11)과 상형(9),하형(10)의 간격을 납도금이 프레스의 형체착압에 의한 변형으로 묻어버리기 때문에 버리가되는 수지의 유출을 방지할수 있다. 또 가령 납도금과 금형사이에 수지가 유출하여도 버리는 납도금상에 부착한다.
수지봉지후 아우터리드상에 리드의 납땜성을 향상시키기 위하여 통상 땜납도금이 실시되지만, 이 공정중에 납도금의 박리조(剝離槽)(용액으로서 초산 15% 용액)를 설치하므로서 납도금은 용이하게 제거됨과 함께 납도금상에 부착한 버리를 완전하게 제거된다.
제 3a 도는 몰드공정후의 사시도이고, 박리공정을 경과하므로서 제3B도와 같이 리드상의 버리는 완전하게 제거된다.
더우기 상기 실시예에서는 도금재료표 납을 사용하였지만 납이외의 금속(예를들면 Ag,Sn등)이라도 용융되지않고 용이하게 변형하는 것이라면 적용이 가능하다. 또 리드프레임에 납을 부착시키는 방법으로 도금을 채용하였지단 엷은막을 압적, 용사(溶射) 등의 방법으로도 용융할수 있는 것이다.
이상과같이 본 발명에 의하면 반도체창치의 조립공정중의 수지봉지때, 수지의 유출부분의 리드프레임상에 납등의 연질의 엷은막 금속출을 형성하므로서 봉지공정의 버리발생을 방지할 수 있는 동시에 다소 유출하여도 도금공정중의 박리공정으로 완전하에 제거할 수 있고 또 종래의 호닝등의 버리제거공정 및 설비를 생략할 수 있는 등의 호과가 있다.

Claims (3)

  1. 수지봉지령 반도체장치의 조립공정에 사용되는 리드프레임애 있어서 봉지수지에서 외부의 아우터리드및 타이 바 부에 난용용성이면서 변형하기 쉬운 엷은 막 금속층을 형성한 것을 특정으로 하는 반도체장치용 리드프레임 .
  2. 제 1 항에 있어서 엷은막 금속층은 납도금에 의하여 형성된 반도체장치용 리드프레임.
  3. 제 1 항 또는 제 2 항에 있어서 엶은막 금속출의 두께는1μ∼20μ으로 된 반도체창치용 리드프레임.
KR1019870008766A 1986-10-13 1987-08-10 반도체 장치용 리드프레임 KR900007230B1 (ko)

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US4942455A (en) 1990-07-17
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