JPH0760839B2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH0760839B2
JPH0760839B2 JP2062789A JP6278990A JPH0760839B2 JP H0760839 B2 JPH0760839 B2 JP H0760839B2 JP 2062789 A JP2062789 A JP 2062789A JP 6278990 A JP6278990 A JP 6278990A JP H0760839 B2 JPH0760839 B2 JP H0760839B2
Authority
JP
Japan
Prior art keywords
bonding
power
wire
pad
signal processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2062789A
Other languages
English (en)
Other versions
JPH03265149A (ja
Inventor
正喜 大田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2062789A priority Critical patent/JPH0760839B2/ja
Priority to US07/668,024 priority patent/US5173762A/en
Priority to KR1019910004027A priority patent/KR910017604A/ko
Priority to DE69119946T priority patent/DE69119946T2/de
Priority to EP91104006A priority patent/EP0446937B1/en
Publication of JPH03265149A publication Critical patent/JPH03265149A/ja
Publication of JPH0760839B2 publication Critical patent/JPH0760839B2/ja
Priority to KR2019950021529U priority patent/KR960000464Y1/ko
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 ［発明の目的］ （産業上の利用分野） この発明は、外囲器の組立におけるワイヤボンディング
を改良した半導体装置に関する。
（従来の技術） 近年、出力回路等に用いられて大電力を取り扱うパワー
素子と微少な電流を取り扱う信号処理用の集積回路を、
１つの半導体チップ上に形成した集積回路が製造される
ようになってきている。
このような集積回路において、パワーMOSFETやパワー・
バイパーラトランジスタ等のパワー素子を用いて構成さ
れる電力部では、数アンペア以上の大電流を取り扱うこ
とになる。このため、電力部から外部に電力を取り出す
ために、従来ではパワー部のワイヤボンディングに多点
ボンディング法が用いられている。
多点ボンディング法を適用した一例としては、例えば第
２図に示すように、リードフレームのダイパット１に搭
載されたチップ２の信号処理部2aにおいては、信号処理
部2a内のパッド3aとインナ−リード４が、一般的に用い
られている例えば径が25〜50μｍ程度のAu（金）線やCu
（銅）線等のボンディングワイヤ５を介して結線されて
いる。これに対して、チップ２のパワー部2bでは、パワ
ー部2b内の電力出力用の１つのパッド3bと１本のインナ
−リード４が、信号処理部2aで用いられているボンディ
ングワイヤ５と同径のボンディングワイヤ５を複数本
（第２図にあっては３本）用いて結線されている。
このように、チップ２のパワー部2bにあっては、信号処
理部2aで用いられている太さのボンディングワイヤが１
本では電流容量が不足するため、ボンディングワイヤの
複数本化によって、電流容量を満足させるようにしてい
る。
しかしながら、このような多点ボンディングにあって
は、ボンディングワイヤを接合部に案内するキャピラリ
の大きさにより、パッド面積に対するボンディング可能
なワイヤの本数は限られる。例えば、50μｍ径のボンデ
ィングワイヤでは、１×３mm2程度の面積のパッドに３
〜４本以上はボンディングできない。
このため、パワー部から取り出される電流は、取り出し
パッドに接合できるボンディングワイヤの本数すなわち
ボンディングパッドの面積に制約されることになる。し
たがって、パワー部の性能を有効最大限に引出すことが
困難となる。
また、多点ボンディングにあっては、比較的狭い範囲に
ワイヤが集中するため、ワイヤ間での短絡が生じ易くな
るとともに、この短絡により電流が集中し、ワイヤが溶
断されるといった不良が生じ易くなる。
さらに、共通のパッドに接合される各々のワイヤの長さ
や各々ワイヤのパワー部での接合位置の相違により、電
流の引出し量にアンバランスが生じたり、パワー部の全
領域内での電力消費バランズが崩れたりして、パワー部
の特性が損なわれるおそれがあった。
（発明が解決しようとする課題） 以上説明したように、１チップに信号処理用の回路と電
力用の回路が集積化された従来の半導体装置にあって
は、電力用の回路に多点ボンディングが用いられてい
た。このため、電力用回路において、その特性を十分に
発揮することが困難になるとともに、信頼性の低下を招
くおそれがあった。
そこで、この発明は、上記の鑑みてなされたものであ
り、その目的とするところは、信頼性の低下を招くこと
なく、本来装置が有している電気的特性を十分かつ有効
に発揮させることが出来る半導体装置を提供することに
ある。
［発明の構成］ （課題を解決するための手段） 上記目的を達成するために、この発明は、複数のボンデ
ィングパッドを有して微少電流を取り扱う信号処理部
と、少なくとも１つのボンディングパッドを有してパワ
ーMOSFET又はパワーバイポーラトランジスタからなるパ
ワー部とを備えた半導体チップがリードフレームのダイ
パッドにマウントされ、Au（金）、Cu（銅）、Ag（銀）
又はPd（パラジウム）からなる第１のボンディングワイ
ヤを介して前記信号処理部の複数のボンディングパッド
とインナーリードがボールボンディング法により結線さ
れ、Al（アルミニウム）又はAlを含む合金からなり第１
のボンディングワイヤよりも太い第２のボンディングワ
イヤを介して前記パワー部のボンディングパッドとイン
ナーリードが超音波ボンディング法により結線されてな
る。
（作用） 上記構成において、この発明は、信頼性の低下及びコス
トの上昇を招くことなく、電力引出用のパッドに他のパ
ッドに結線されたボンディングワイヤよりも太いボンデ
ィングワイヤを結線するようにしている。
（実施例） 以下、図面を用いてこの発明の実施例を説明する。
第１図はこの発明の一実施例に係わる半導体装置の構成
を示す図である。
第１図において、リードフレームのダイパット11にマウ
ントされた半導体チップ12は、バイポーラトランジスタ
とCMOSFETとからなる信号処理部12aと、パワーMOSFETか
らなるパワー部12bとで構成されている。
信号処理部12aは、それぞれのボンディングパッド13aと
インナーリード14が、38μｍ径程度の太さのAuからなる
ボンディングワイヤ15を介してそれぞれ結線されてい
る。
パワー部12bは、例えばソース／ドレイン耐圧値が60V以
上、連続出力可能な電流値が4A程度、オン抵抗値が0.22
Ω程度以下の特性を有するパワーMOSFETからなる。この
パワーMOSFETの出力端となるボンディングパッド13a
は、250μｍ径程度の太さのAlからなるボンディングワ
イヤ16を介してインナーリード14と結線されている。
信号処理部12aにおけるワイヤボンディングは、一般的
に用いられているボールボンディング法を使用してい
る。一方、パワー部12bにおけるワイヤボンディングで
は、超音波ボンディング法を用いており、このボンディ
ング法により比較的太いワイヤのボンディングを可能に
している。
このように、信号処理部12aとパワー部12bとで使用され
るボンディング法が異なるが、それぞれのボンディング
法は従来から一般的に用いられているため、それぞれの
ボンディング法を行なう組立装置を順に用いることによ
り実施することが可能となる。また、それぞれのボンデ
ィング組立装置を一体化することにより、生産性の低下
を招くことなくワイヤボンディングの作業工程を実施す
ることが可能となる。
このような構成においては、ボンディングワイヤの径が
従来から用いられているボンディングワイヤの径に比し
てかなり太いため、パワーMOSFETの連続出力電流値を１
本のボンディングワイヤで十分に流すことが可能とな
る。また、パワーMOSFETの最大出力電流値が連続出力電
流値の２倍の8A程度とすると、250μｍ径の１本のボン
ディングワイヤでこの値を許容することができる。
これに対して、従来から一般的に用いられている例えば
50μｍ径のボンディングワイヤにあっては、１本の電流
容量が２〜3A程度で6A程度の電流で溶断されてしまう。
このため、上述したパワーMOSFETの連続出力電流及び最
大出力電流を許容するためには、少なくとも３本以上の
ボンディングワイヤが必要となる。
また、250μｍ径のボンディングワイヤの接合に必要な
ボンディング領域は、50μｍ径のボンディングワイヤを
３本接合するに必要なボンディング領域に比して、かな
り縮少することが可能となる。
したがって、この発明による上記実施例にあっては、小
さな占有面積のボンディングパッドに比較的太い径のボ
ンディングワイヤを結線するようにしているので、限ら
れた面積のボンディングパッドから従来の比してより多
くの電流を取り出すことが可能となり、パワー部の特性
を十分に引き出すことができるようになる。
また、１ケ所のパッドから引出されるボンディングワイ
ヤを１本にすることにより、ボンディングワイヤの開放
不良や短絡不良が防止され、信頼性が向上する。さら
に、ボンディングワイヤの長さやパワーMOSFETとの接合
位置の相違に寄因した出力電流のアンバランスやパワー
MOSFETの占有面積に対する消費電力のアンバランスも解
消され、パワーMOSFETの特性劣化が抑制される。
一方、ボンディングワイヤにAl線を用いているので、ワ
イヤの径を太くしても、同径のAu線に比べてチップに損
傷を与えることなくボンディングを行なうことが可能と
なる。さらに、ボンディングワイヤにAu線を用いる場合
に比して、コストを大幅に低減することが可能となる。
なお、この発明は、上記実施例に限ることはなく、例え
ば１つのチップが信号処理用の回路と電力用の回路とで
構成されていなくとも、１チップに微少な電流が入出力
するパッドと大電力を取り出すための出力パッドを有す
る集積回路であっても適用できることは勿論である。
また、上記実施例における信号処理部12aに使用される
ボンディングワイヤの材質は、Auでなくとも例えばCuや
Ag（銀）、Pd（パラジウム）等であってもかまわない。
さらに、パワー部12bに使用されるボンディングワイヤ
の材質は、Alの他に例えばAlを含む合金であっても良
い。
［発明の効果］ 以上説明したように、この発明によれば、材質の異なる
ボンディングワイヤでもって１つのチップと外部とを結
線するようにしたので、信頼性の低下及びコストの上昇
を招くことなく、電力引出し用のパッドに太いボンディ
ングワイヤを結線することが可能となる。これにより、
本来半導体装置が有している電気的特性を十分かつ有効
に発揮させることができるようになる。
【図面の簡単な説明】
第１図はこの発明の一実施例に係わる半導体装置の構成
を示す図、第２図は従来の多点ボンディングを用いた半
導体装置の構成を示す図である。 1,11……ダイパット 2,12……半導体チップ 3a,3b,13a,13b……ボンディングパッド 4,14……インナーリード 5,15,16……ボンディングワイヤ

Claims (1)

    【特許請求の範囲】
  1. 【請求項１】複数のボンディングパッドを有して微少電
    流を取り扱う信号処理部と、少なくとも１つのボンディ
    ングパッドを有してパワーMOSFET又はパワーバイポーラ
    トランジスタからなるパワー部とを備えた半導体チップ
    がリードフレームのダイパッドにマウントされ、Au
    （金）、Cu（銅）、Ag（銀）又はPd（パラジウム）から
    なる第１のボンディングワイヤを介して前記信号処理部
    の複数のボンディングパッドとインナーリードがボール
    ボンディング法により結線され、Al（アルミニウム）又
    はAlを含む合金からなり第１のボンディングワイヤより
    も太い第２のボンディングワイヤを介して前記パワー部
    のボンディングパッドとインナーリードが超音波ボンデ
    ィング法により結線されてなる ことを特徴とする半導体装置。
JP2062789A 1990-03-15 1990-03-15 半導体装置 Expired - Lifetime JPH0760839B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2062789A JPH0760839B2 (ja) 1990-03-15 1990-03-15 半導体装置
US07/668,024 US5173762A (en) 1990-03-15 1991-03-12 Semiconductor device using bonding wires of different materials
KR1019910004027A KR910017604A (ko) 1990-03-15 1991-03-14 반도체장치
DE69119946T DE69119946T2 (de) 1990-03-15 1991-03-15 Verfahren zur Herstellung einer Halbleitervorrichtung mit Lotanschlussdrähten aus unterschiedlichen Materialien
EP91104006A EP0446937B1 (en) 1990-03-15 1991-03-15 Method of manufacturing a semiconductor device using bonding wires of different material
KR2019950021529U KR960000464Y1 (ko) 1990-03-15 1995-08-21 반도체장치(a semiconductor device)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2062789A JPH0760839B2 (ja) 1990-03-15 1990-03-15 半導体装置

Publications (2)

Publication Number Publication Date
JPH03265149A JPH03265149A (ja) 1991-11-26
JPH0760839B2 true JPH0760839B2 (ja) 1995-06-28

Family

ID=13210467

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2062789A Expired - Lifetime JPH0760839B2 (ja) 1990-03-15 1990-03-15 半導体装置

Country Status (5)

Country Link
US (1) US5173762A (ja)
EP (1) EP0446937B1 (ja)
JP (1) JPH0760839B2 (ja)
KR (2) KR910017604A (ja)
DE (1) DE69119946T2 (ja)

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JP2807396B2 (ja) * 1993-05-25 1998-10-08 ローム株式会社 半導体装置
US5530284A (en) * 1995-03-06 1996-06-25 Motorola, Inc. Semiconductor leadframe structure compatible with differing bond wire materials
WO1998021751A2 (de) * 1996-11-11 1998-05-22 Siemens Aktiengesellschaft Optimierung der leistungsverbindung zwischen chip und leiterrahmen für leistungsschalter
US6476481B2 (en) 1998-05-05 2002-11-05 International Rectifier Corporation High current capacity semiconductor device package and lead frame with large area connection posts and modified outline
DE29924183U1 (de) 1998-05-05 2002-03-28 International Rectifier Corp., El Segundo, Calif. Gehäuse und Leitungsrahmen für ein Halbleiterbauelement hoher Stromleitfähigkeit, mit großflächigen Verbindungsschlüssen und veränderter Form
CN1440077A (zh) * 2002-02-21 2003-09-03 松下电器产业株式会社 半导体装置、设计方法及记录其装置设计程序的记录媒体
TW586203B (en) * 2002-11-04 2004-05-01 Siliconware Precision Industries Co Ltd Semiconductor package with lead frame as chip carrier and method for fabricating the same
JP2004281887A (ja) * 2003-03-18 2004-10-07 Himeji Toshiba Ep Corp リードフレーム及びそれを用いた電子部品
DE102005016830A1 (de) * 2004-04-14 2005-11-03 Denso Corp., Kariya Halbleitervorrichtung und Verfahren zu ihrer Herstellung
US8125060B2 (en) * 2006-12-08 2012-02-28 Infineon Technologies Ag Electronic component with layered frame
JP4830877B2 (ja) * 2007-01-31 2011-12-07 トヨタ自動車株式会社 半導体装置の製造方法
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JP5192163B2 (ja) * 2007-03-23 2013-05-08 住友電工デバイス・イノベーション株式会社 半導体装置
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Also Published As

Publication number Publication date
US5173762A (en) 1992-12-22
DE69119946D1 (de) 1996-07-11
KR910017604A (ko) 1991-11-05
JPH03265149A (ja) 1991-11-26
EP0446937B1 (en) 1996-06-05
KR960000464Y1 (ko) 1996-01-10
EP0446937A3 (ja) 1994-02-02
DE69119946T2 (de) 1996-11-28
EP0446937A2 (en) 1991-09-18

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