JPS5844729A - ボンデイングワイヤをもつ半導体装置 - Google Patents

ボンデイングワイヤをもつ半導体装置

Info

Publication number
JPS5844729A
JPS5844729A JP56142246A JP14224681A JPS5844729A JP S5844729 A JPS5844729 A JP S5844729A JP 56142246 A JP56142246 A JP 56142246A JP 14224681 A JP14224681 A JP 14224681A JP S5844729 A JPS5844729 A JP S5844729A
Authority
JP
Japan
Prior art keywords
bonding
wire
diameter
semiconductor device
wires
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56142246A
Other languages
English (en)
Inventor
Hiroshi Mochizuki
望月　博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56142246A priority Critical patent/JPS5844729A/ja
Publication of JPS5844729A publication Critical patent/JPS5844729A/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901—Structure
    • H01L2224/4903—Connectors having different sizes, e.g. different diameters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4905—Shape
    • H01L2224/49051—Connectors having different shapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49112—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting a common bonding area on the semiconductor or solid-state body to different bonding areas outside the body, e.g. diverging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 本発明は、電気的接続手段としてボンディングワイヤを
使用する半導体装置に関する。
半導体装置のベレット面からリードフレームに電気的接
続をさせる場合、ＡｕワイヤやＡｌワイヤ等のボンディ
ングワイヤを用いている。そしてこのワイヤボンディン
グを１工程で行なうために、複数個所のワイヤ結線のす
べてについて必ず１種類のワイヤ径のボンディングワイ
ヤを使用している。例えば、電力用ＩＣの場合、大電流
が流れるパワ一段部の電気的機械的接続のために十分な
容量強度をもつ大径のボンディングワイヤを、それ以外
の接続についても使用するか、又は小電流の接続に適当
な小径のボンディングワイヤをパワ一段部の接続に複数
本まとめて使用するかしている。
しかしながら、複数個所のワイヤ結線をする場合、電気
的機械的にワイヤ径を統一することは必ずしも必要でな
いことが多い。したがって、必要としない個所に大径の
ボンディングワイヤを使用するのは、Ａｕ等貴金属が高
騰している中でコスト低減の面に問題であり、大電流が
流れる個所に複数本のボンディングワイヤを使用するの
は、高集積化高信頼性化の面で問題である。
本発明者は上記問題を解決する半導体装置として、ボン
ディングワイヤを、ペレット上に設けた′ポンディング
パッドからの電気的接続手段とする半導体装置において
、複数の上記ボンディングワイヤを、少なくとも２種類
のワイヤ径のものどじ、かつ各上記ポンディングパッド
の面積を、そこに使用したボンディングワイヤのワイヤ
径に夫々対応させることを特徴とする半導体装置を提案
する。
以下図面に示した一実施例に従い本発明の詳細な説明す
る。
本発明の半導体装置のワイヤボンディングは、第１図に
示すように、半導体ペレット１からパッケージ導体部３
へ、゛大電流が流れる電極部６からは大径のボンディン
グワイヤ４によって、小電流が流れる電極部７からは小
径のボンディングワイヤ５によって電気的に接続される
。半導体ペレット１は、１リードフレーム等のベッド部
２の上に上向きに固定されていればよい。そして半導体
ペレットの電極部６，７は、Ａｕ表層の電極やＡＩ電極
が多用され、場合に応じＡｇ表層の電極、Ａｕ−Ｐｄ若
しくはＡｇ　−Ｐｔの厚膜導体等を使用したものでもよ
い。
ワイヤボンディングの方法には、熱圧着法、超音波ボン
ディング法、サーモソニックボンディング法、抵抗溶接
法、レーザ溶接法、はんだ付は法の方法にも適用するこ
とができる。使用するボンディングワイヤは、いずれの
方法の場合でも、Ａｕ又はＡＩの７．５〜２５０μｍ径
の細卵が用いられ、特に２５　、３０　、３８　、４５
　、５０μｍなどの径のものが規格化されている。
第１図の電力用ＩＣに用いたボンディングワイヤは、パ
ワ一段部については５０・μｍ径Ａｕ　＠　４を、その
他小電流部には２５μｍ径Ａｕ線５を使用した。
このように少くとも２種類のワイヤ径のＡｕ線をワイヤ
ボンディングするには、２台のボンダを順次通過させる
か或は２ヘツドのボンダを使用するかしてボンディング
することができる。
５０μｍ径Ａｕ線は、溶断電流が約１．４Ａと容量が大
きく、また熱圧着させるペレット上のボンディングパッ
ド６の所要面積は約１５０μｍ平方であって単位電流量
に対する所要ポンディングパッド面積は狭くてすむが、
破断強度や伸びは機械的定格に対して過剰に高く、また
２５　ｐｍ径Ａｕ線に比較して約４倍も重量がある。一
方２５μｍ径Ａｕ線は、破断強度や伸びは機械的定格を
満たしており、溶断電流は約ｏ、７Ａと小電流用として
適当であるが、熱圧着させるポンディングパッド７の所
要面積は約１００　ｐＷＩ平方であって、単位電流量に
対する所要ポンディングパッド面積は５０μｍ径Ａｕ線
よりもむしろ大きい。
そこで本発明は、電気的及び機械的定格に合わせてボン
ディングワイヤとして少なくとも２種類のワイヤ径のも
のを選択し、第２図のペレット１上に設けたポンディン
グパッドのように、ワイヤ径の大きなボンディングワイ
ヤ４に対応した面積のポンディングパッド６と、ワイヤ
径の小さいボンディングワイヤ５に対応した面積のポン
ディングパッド７とを設ける。このように設けたポンデ
ィングパッドの合計面積は、従来のように１種類のワイ
ヤ径のボンディングワイヤを用いたときに比べて、小面
積ですむ。
従って、本発明によれば、定格に合わせて合理的に少な
くとも２種類のワイヤ径のボンディングワイヤを用いる
から、高価なワイヤの重量を低減することができ、ポン
ディングパッドの合計面積縮少による装置の高密度化を
図ることができ、またポンディングパッドに各１本のボ
ンディングワイヤを接続するからポンディフグ点数減少
による装置の高信頼性化が達成できる。
【図面の簡単な説明】
第１図は本発明の実施例におけるワイヤボンディング局
部平面図、第２図は第１図のペレット上のポンディング
パッドの面積説明図である。 １・・・ペレット、４，５・・・ボンディングワイヤ、
６．７・・・ポンディングパッド。

Claims (1)

    【特許請求の範囲】
  1. １　ボンディングワイヤを、ペレット上に設けたポンデ
    ィングパッドからの電気的接続手段とする半導体装置に
    ・おいて、複数の上記ボンディングワイヤを、少なくと
    も２種類のワイヤ径のものとし、かつ各上記ポンディン
    グパッドの面積を、そこに使用したボンディングワイヤ
    のワイヤ径に夫々対応させることを特徴とする半導体装
    置。
JP56142246A 1981-09-11 1981-09-11 ボンデイングワイヤをもつ半導体装置 Pending JPS5844729A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56142246A JPS5844729A (ja) 1981-09-11 1981-09-11 ボンデイングワイヤをもつ半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56142246A JPS5844729A (ja) 1981-09-11 1981-09-11 ボンデイングワイヤをもつ半導体装置

Publications (1)

Publication Number Publication Date
JPS5844729A true JPS5844729A (ja) 1983-03-15

Family

ID=15310838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56142246A Pending JPS5844729A (ja) 1981-09-11 1981-09-11 ボンデイングワイヤをもつ半導体装置

Country Status (1)

Country Link
JP (1) JPS5844729A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008211086A (ja) * 2007-02-27 2008-09-11 Renesas Technology Corp 半導体チップ

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008211086A (ja) * 2007-02-27 2008-09-11 Renesas Technology Corp 半導体チップ

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