JPH04155949A - 樹脂封止型半導体装置 - Google Patents

樹脂封止型半導体装置

Info

Publication number
JPH04155949A
JPH04155949A JP28248490A JP28248490A JPH04155949A JP H04155949 A JPH04155949 A JP H04155949A JP 28248490 A JP28248490 A JP 28248490A JP 28248490 A JP28248490 A JP 28248490A JP H04155949 A JPH04155949 A JP H04155949A
Authority
JP
Japan
Prior art keywords
lead frame
plating
solder
resin
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28248490A
Other languages
English (en)
Inventor
Hideharu Hasegawa
秀晴 長谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Yamagata Ltd
Original Assignee
NEC Yamagata Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Yamagata Ltd filed Critical NEC Yamagata Ltd
Priority to JP28248490A priority Critical patent/JPH04155949A/ja
Publication of JPH04155949A publication Critical patent/JPH04155949A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/26175—Flow barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、樹脂封止型半導体装置に関し、特にダイボン
ディング用ソルダのリードフレームへの流出しを防止し
た半導体装置に関する。
〔従来の技術〕
従来の樹脂封止型半導体装置は、第２図に示す用に、リ
ードフレーム上面がＡｇメツキ１０で覆われており、ダ
イボンディング用Ａｕ−５ｕソルダ３を熱により溶解し
て、半導体素子１の（ｌｌＡ　ｕとリードフレーム上面
Ａｇメツキとを接着させてダイボンディングしている。
〔発明が解決しようとする課題〕
この従来の樹脂封止型半導体装置は、リードフレーム上
面が、ダイボンディング用Ａｕ−８ｕソルダ３となじみ
の良いＡｇメツキ１０で覆われているので、ソルダの流
出しが起こり、リードフレーム上面のＡｕワイヤ２のボ
ンディングエリアに達してし家い、Ａｕワイヤ２のボン
ディングが出来ないという問題点があった。
本発明の目的は、このような問題を解決し、ダイボンデ
ィング用ソルダのリードフレームへの流出を防止した半
導体装置を提供することにある。
〔課題を解決するための手段〕
本発明の構成は、リードフレーム上面の金属材に半導体
素子が搭載され、この半導体素子の電極がＡｕワイヤに
より前記リードフレーム上面の金属材に連結され、前記
半導体素子および前記リードフレームの連結部が樹脂で
封止された樹脂封止型半導体装置において、前記リード
フレーム上面のダイボンディング部とＡｕワイヤの連結
部との間にある金属材を酸化金属とすることにより、ダ
イボンディング用ソルダの前記リードフレームへの流出
を防止するようにしたことを特徴とする。
〔実施例〕
次に本発明について、図面を参照して説明する。
第１図は、本発明の一実施例の断面図である。
リードフレーム素材は、４２合金７の両面にＣｕストラ
イクメツキ６が行われたものを用いている。このリード
フレーム上にダイボンディング部Ａｇメツキ４およびＡ
ｕワイヤボンディングエリアにＡｇメツキ５を形成し、
Ａｇメツキ４の上に半導体素子１を搭載し、Ａｕ−５ｎ
ソルダ３によりダイホンディングされる。このリードフ
レームの露出しなＣｕストライクメツキ６の部分は酸化
処理されて酸化銅つとなっている。また、半導体素子１
のポンディングパッドをＡｇメツキ５との間がＡｕワイ
ヤ２により接続され、最後にこれらが封止用樹脂８で覆
われる。
〔発明の効果〕
以上説明した様に本発明は、従来Ａｇメツキされている
リードフレームのダイボンディング部とＡｕワイヤボン
ディングエリア間を酸化金属にすることにより、Ａｕワ
イヤボンディングエリアへの、Ａｕ−８ｎソルダの流出
が防止でき、安定してＡｕワイヤボンディングが出来る
という効果がある。
【図面の簡単な説明】
第１図は本発明の樹脂封止型半導体装置の一実施例の断
面図、第２図は従来の樹脂封止型半導体装置の一例の断
面図である。 １・・・半導体素子、２・・・Ａｕワイヤ、３・・・Ａ
ｕ−５ｎソルダ、４・・・ダイボンディング部Ａｇメツ
キ、５・・・ＡｕワイヤボンディングエリアのＡｇメ°
　ツキ、６・・・Ｃｕストライクメツキ、７・・・４２
合金、８・・・封止用樹脂、９・・・酸化銅、１０・・
・Ａｇメツキ。

Claims (1)

    【特許請求の範囲】
  1. 　リードフレーム上面の金属材に半導体素子が搭載され
    、この半導体素子の電極がＡｕワイヤにより前記リード
    フレーム上面の金属材に連結され、前記半導体素子およ
    び前記リードフレームの連結部が樹脂で封止された樹脂
    封止型半導体装置において、前記リードフレーム上面の
    ダイボンディング部とＡｕワイヤの連結部との間にある
    金属材を酸化金属とすることにより、ダイボンディング
    用ソルダの前記リードフレームへの流出を防止するよう
    にしたことを特徴とする樹脂封止型半導体装置。
JP28248490A 1990-10-19 1990-10-19 樹脂封止型半導体装置 Pending JPH04155949A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28248490A JPH04155949A (ja) 1990-10-19 1990-10-19 樹脂封止型半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28248490A JPH04155949A (ja) 1990-10-19 1990-10-19 樹脂封止型半導体装置

Publications (1)

Publication Number Publication Date
JPH04155949A true JPH04155949A (ja) 1992-05-28

Family

ID=17653040

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28248490A Pending JPH04155949A (ja) 1990-10-19 1990-10-19 樹脂封止型半導体装置

Country Status (1)

Country Link
JP (1) JPH04155949A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000063969A1 (en) * 1999-04-16 2000-10-26 Micron Technology, Inc. Electrical conductor system of a semiconductor device and manufacturing method thereof
US7663242B2 (en) * 2001-05-24 2010-02-16 Lewis Brian G Thermal interface material and solder preforms
WO2014198511A1 (de) * 2013-06-14 2014-12-18 Robert Bosch Gmbh Substrat mit einem aus oxid, sulfid oder nitrid bestehenden lotstoppbereich zur begrenzung eines lotbereichs und entsprechendes herstellungsverfahren
JP2016058612A (ja) * 2014-09-11 2016-04-21 株式会社デンソー 半導体装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000063969A1 (en) * 1999-04-16 2000-10-26 Micron Technology, Inc. Electrical conductor system of a semiconductor device and manufacturing method thereof
US6707152B1 (en) 1999-04-16 2004-03-16 Micron Technology, Inc. Semiconductor device, electrical conductor system, and method of making
EP1918992A1 (en) * 1999-04-16 2008-05-07 Micron Technology, Inc. Electrical conductor system of a semiconductor device and manufacturing method thereof
US7663242B2 (en) * 2001-05-24 2010-02-16 Lewis Brian G Thermal interface material and solder preforms
WO2014198511A1 (de) * 2013-06-14 2014-12-18 Robert Bosch Gmbh Substrat mit einem aus oxid, sulfid oder nitrid bestehenden lotstoppbereich zur begrenzung eines lotbereichs und entsprechendes herstellungsverfahren
JP2016058612A (ja) * 2014-09-11 2016-04-21 株式会社デンソー 半導体装置

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