JPS5779653A - Lead frame for resin-sealed semiconductor device - Google Patents

Lead frame for resin-sealed semiconductor device

Info

Publication number
JPS5779653A
JPS5779653A JP15635480A JP15635480A JPS5779653A JP S5779653 A JPS5779653 A JP S5779653A JP 15635480 A JP15635480 A JP 15635480A JP 15635480 A JP15635480 A JP 15635480A JP S5779653 A JPS5779653 A JP S5779653A
Authority
JP
Japan
Prior art keywords
resin
lead
lead frame
tin
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15635480A
Other languages
Japanese (ja)
Other versions
JPS6130749B2 (en
Inventor
Mitsuru Imai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15635480A priority Critical patent/JPS5779653A/en
Publication of JPS5779653A publication Critical patent/JPS5779653A/en
Publication of JPS6130749B2 publication Critical patent/JPS6130749B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582Metallic layers on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Abstract

PURPOSE:To improve quality of a semiconductor device, by gold- or silver-plating an element mounting part of an internal lead for a lead frame, tin-plating an external lead, and forming a narrow part reinforced by a nonconductor in a part of internal leads. CONSTITUTION:A stitching part 5 and a die mounting part 2 of an internal lead for a lead frame are gold- or silver-plated. An external lead is tin-plated. A narrow part 9 is formed so that an internal lead and a die support en route from the stitch 5 and the die mounting part 2 to a resin-sealed end are remarkably narrower than the other parts. This part 9 is reinforced by an electrical and thermal nonconductor 10. This prevents resin from forcing out in resin molding. A tin-plating process is not needed after sealing. The manufacturing process is facilitated and the quality is improved.
JP15635480A 1980-11-06 1980-11-06 Lead frame for resin-sealed semiconductor device Granted JPS5779653A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15635480A JPS5779653A (en) 1980-11-06 1980-11-06 Lead frame for resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15635480A JPS5779653A (en) 1980-11-06 1980-11-06 Lead frame for resin-sealed semiconductor device

Publications (2)

Publication Number Publication Date
JPS5779653A true JPS5779653A (en) 1982-05-18
JPS6130749B2 JPS6130749B2 (en) 1986-07-15

Family

ID=15625916

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15635480A Granted JPS5779653A (en) 1980-11-06 1980-11-06 Lead frame for resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPS5779653A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4876587A (en) * 1987-05-05 1989-10-24 National Semiconductor Corporation One-piece interconnection package and process
US4942455A (en) * 1986-10-13 1990-07-17 Mitsubishi Denki Kabushiki Kaisha Lead frame for a semiconductor device and a method for manufacturing a semiconductor device using the lead frame
US4985749A (en) * 1988-03-22 1991-01-15 Bull S.A. Substrate for very large scale integrated circuit and apparatus for selective tinning of the substrate leads

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4942455A (en) * 1986-10-13 1990-07-17 Mitsubishi Denki Kabushiki Kaisha Lead frame for a semiconductor device and a method for manufacturing a semiconductor device using the lead frame
US5026669A (en) * 1986-10-13 1991-06-25 Mitsubishi Denki Kabushiki Kaisha Method of eliminating burrs on a lead frame with a thin metal coating
US4876587A (en) * 1987-05-05 1989-10-24 National Semiconductor Corporation One-piece interconnection package and process
US4985749A (en) * 1988-03-22 1991-01-15 Bull S.A. Substrate for very large scale integrated circuit and apparatus for selective tinning of the substrate leads
US5081949A (en) * 1988-03-22 1992-01-21 Bull S.A. Apparatus for selective tinning of substrate leads

Also Published As

Publication number Publication date
JPS6130749B2 (en) 1986-07-15

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