JPS55163868A - Lead frame and semiconductor device using the same - Google Patents

Lead frame and semiconductor device using the same

Info

Publication number
JPS55163868A
JPS55163868A JP7111779A JP7111779A JPS55163868A JP S55163868 A JPS55163868 A JP S55163868A JP 7111779 A JP7111779 A JP 7111779A JP 7111779 A JP7111779 A JP 7111779A JP S55163868 A JPS55163868 A JP S55163868A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
lead
frame
chip
terminal
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7111779A
Inventor
Tsuyoshi Aoki
Akihiro Kubota
Rikio Sugiura
Osamu Yamauchi
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Abstract

PURPOSE:To enhance the strength of an external connector in a lead frame of a resin molded semiconductor device and increase the density of a chip connector by forming thin chip carrying base of the lead frame and thin lead terminal formed therearound and thick external connecting lead terminal. CONSTITUTION:A guide hole 5 is perforated at a metallic plate, and thin and thick portions A and B are formed by pressing. Then, a chip carrying base 2 and a lead terminal 3 are formed on the lead frame 1 by stamping. The semiconductor chip is carried on a chip carrying base 2, wire bonded to the lead terminal 3, and clamped from both front and rear surfaces of the molding frame, resin is filled to seal the semiconductor device.
JP7111779A 1979-06-08 1979-06-08 Lead frame and semiconductor device using the same Granted JPS55163868A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7111779A JPS55163868A (en) 1979-06-08 1979-06-08 Lead frame and semiconductor device using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7111779A JPS55163868A (en) 1979-06-08 1979-06-08 Lead frame and semiconductor device using the same

Publications (1)

Publication Number Publication Date
JPS55163868A true true JPS55163868A (en) 1980-12-20

Family

ID=13451293

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7111779A Granted JPS55163868A (en) 1979-06-08 1979-06-08 Lead frame and semiconductor device using the same

Country Status (1)

Country Link
JP (1) JPS55163868A (en)

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61150358A (en) * 1984-12-25 1986-07-09 Shinko Electric Ind Co Ltd Lead frame and manufacture thereof
EP0989608A3 (en) * 1998-09-21 2001-01-10 Amkor Technology Inc. Plastic integrated circuit device package and method of making the same
US6433277B1 (en) 1998-06-24 2002-08-13 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
US6448633B1 (en) 1998-11-20 2002-09-10 Amkor Technology, Inc. Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant
US6756658B1 (en) 2001-04-06 2004-06-29 Amkor Technology, Inc. Making two lead surface mounting high power microleadframe semiconductor packages
US6833609B1 (en) 1999-11-05 2004-12-21 Amkor Technology, Inc. Integrated circuit device packages and substrates for making the packages
US6847103B1 (en) 1999-11-09 2005-01-25 Amkor Technology, Inc. Semiconductor package with exposed die pad and body-locking leadframe
US6858919B2 (en) 2000-03-25 2005-02-22 Amkor Technology, Inc. Semiconductor package
US7042068B2 (en) 2000-04-27 2006-05-09 Amkor Technology, Inc. Leadframe and semiconductor package made using the leadframe
US7906855B1 (en) 2008-01-21 2011-03-15 Amkor Technology, Inc. Stacked semiconductor package and method of making same
US8154111B2 (en) 1999-12-16 2012-04-10 Amkor Technology, Inc. Near chip size semiconductor package
US8866278B1 (en) 2011-10-10 2014-10-21 Amkor Technology, Inc. Semiconductor device with increased I/O configuration
US8952522B1 (en) 2002-11-08 2015-02-10 Amkor Technology, Inc. Wafer level package and fabrication method
US8981572B1 (en) 2011-11-29 2015-03-17 Amkor Technology, Inc. Conductive pad on protruding through electrode semiconductor device
US9048298B1 (en) 2012-03-29 2015-06-02 Amkor Technology, Inc. Backside warpage control structure and fabrication method
US9082833B1 (en) 2011-01-06 2015-07-14 Amkor Technology, Inc. Through via recessed reveal structure and method
US9129943B1 (en) 2012-03-29 2015-09-08 Amkor Technology, Inc. Embedded component package and fabrication method
US9631481B1 (en) 2011-01-27 2017-04-25 Amkor Technology, Inc. Semiconductor device including leadframe with a combination of leads and lands and method
US9673122B2 (en) 2014-05-02 2017-06-06 Amkor Technology, Inc. Micro lead frame structure having reinforcing portions and method
US9691734B1 (en) 2009-12-07 2017-06-27 Amkor Technology, Inc. Method of forming a plurality of electronic component packages
US9704725B1 (en) 2012-03-06 2017-07-11 Amkor Technology, Inc. Semiconductor device with leadframe configured to facilitate reduced burr formation

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4947590A (en) * 1972-09-11 1974-05-08

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4947590A (en) * 1972-09-11 1974-05-08

Cited By (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61150358A (en) * 1984-12-25 1986-07-09 Shinko Electric Ind Co Ltd Lead frame and manufacture thereof
US6433277B1 (en) 1998-06-24 2002-08-13 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
EP0989608A3 (en) * 1998-09-21 2001-01-10 Amkor Technology Inc. Plastic integrated circuit device package and method of making the same
US6455356B1 (en) 1998-10-21 2002-09-24 Amkor Technology Methods for moding a leadframe in plastic integrated circuit devices
US6521987B1 (en) 1998-10-21 2003-02-18 Amkor Technology, Inc. Plastic integrated circuit device package and method for making the package
US6448633B1 (en) 1998-11-20 2002-09-10 Amkor Technology, Inc. Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant
US6833609B1 (en) 1999-11-05 2004-12-21 Amkor Technology, Inc. Integrated circuit device packages and substrates for making the packages
US6847103B1 (en) 1999-11-09 2005-01-25 Amkor Technology, Inc. Semiconductor package with exposed die pad and body-locking leadframe
US8154111B2 (en) 1999-12-16 2012-04-10 Amkor Technology, Inc. Near chip size semiconductor package
US6858919B2 (en) 2000-03-25 2005-02-22 Amkor Technology, Inc. Semiconductor package
US7042068B2 (en) 2000-04-27 2006-05-09 Amkor Technology, Inc. Leadframe and semiconductor package made using the leadframe
US6756658B1 (en) 2001-04-06 2004-06-29 Amkor Technology, Inc. Making two lead surface mounting high power microleadframe semiconductor packages
US9054117B1 (en) 2002-11-08 2015-06-09 Amkor Technology, Inc. Wafer level package and fabrication method
US9871015B1 (en) 2002-11-08 2018-01-16 Amkor Technology, Inc. Wafer level package and fabrication method
US8952522B1 (en) 2002-11-08 2015-02-10 Amkor Technology, Inc. Wafer level package and fabrication method
US7906855B1 (en) 2008-01-21 2011-03-15 Amkor Technology, Inc. Stacked semiconductor package and method of making same
US9691734B1 (en) 2009-12-07 2017-06-27 Amkor Technology, Inc. Method of forming a plurality of electronic component packages
US9082833B1 (en) 2011-01-06 2015-07-14 Amkor Technology, Inc. Through via recessed reveal structure and method
US9631481B1 (en) 2011-01-27 2017-04-25 Amkor Technology, Inc. Semiconductor device including leadframe with a combination of leads and lands and method
US9978695B1 (en) 2011-01-27 2018-05-22 Amkor Technology, Inc. Semiconductor device including leadframe with a combination of leads and lands and method
US8866278B1 (en) 2011-10-10 2014-10-21 Amkor Technology, Inc. Semiconductor device with increased I/O configuration
US8981572B1 (en) 2011-11-29 2015-03-17 Amkor Technology, Inc. Conductive pad on protruding through electrode semiconductor device
US9947623B1 (en) 2011-11-29 2018-04-17 Amkor Technology, Inc. Semiconductor device comprising a conductive pad on a protruding-through electrode
US9704725B1 (en) 2012-03-06 2017-07-11 Amkor Technology, Inc. Semiconductor device with leadframe configured to facilitate reduced burr formation
US9048298B1 (en) 2012-03-29 2015-06-02 Amkor Technology, Inc. Backside warpage control structure and fabrication method
US9129943B1 (en) 2012-03-29 2015-09-08 Amkor Technology, Inc. Embedded component package and fabrication method
US9673122B2 (en) 2014-05-02 2017-06-06 Amkor Technology, Inc. Micro lead frame structure having reinforcing portions and method

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