KR900002574A - 프로그래머블 순차코오드 인식회로 - Google Patents

프로그래머블 순차코오드 인식회로 Download PDF

Info

Publication number
KR900002574A
KR900002574A KR1019880008954A KR880008954A KR900002574A KR 900002574 A KR900002574 A KR 900002574A KR 1019880008954 A KR1019880008954 A KR 1019880008954A KR 880008954 A KR880008954 A KR 880008954A KR 900002574 A KR900002574 A KR 900002574A
Authority
KR
South Korea
Prior art keywords
code recognition
recognition circuit
individual
programmable
circuit
Prior art date
Application number
KR1019880008954A
Other languages
English (en)
Other versions
KR910005615B1 (ko
Inventor
최정달
임형규
도재영
김진기
Original Assignee
강진구
삼성반도체통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 강진구, 삼성반도체통신 주식회사 filed Critical 강진구
Priority to KR1019880008954A priority Critical patent/KR910005615B1/ko
Priority to US07/356,172 priority patent/US5015886A/en
Priority to DE3917945A priority patent/DE3917945C2/de
Priority to FR898907318A priority patent/FR2634299B1/fr
Priority to JP1139415A priority patent/JP2551659B2/ja
Priority to NL8901533A priority patent/NL193258C/nl
Priority to GB8916398A priority patent/GB2221072B/en
Publication of KR900002574A publication Critical patent/KR900002574A/ko
Application granted granted Critical
Publication of KR910005615B1 publication Critical patent/KR910005615B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/28—Error detection; Error correction; Monitoring by checking the correct order of processing
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02—Comparing digital values

Abstract

내용 없음.

Description

프로그래머블 순차코오드 인식회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 블록다이어그램.
제2도는 본 발명의 개별코오드 인식회로도의 일실시예.
제3도는 본 발명의 순차인식회로도의 일실시예.

Claims (3)

  1. 복수개의 동작모우드를 가지는 반도체 소자에 있어서, 개개의 입력코오드를 인식하는 개별코오드 인식회로(10)와, 개별코오드의 정해진 순서를 인식하는 순차인식회로(20)와로 구성되어, 순서적으로 입력되는 입력조합에 의하여 특정 모우드가 선택되게 한 것을 특징으로 하는 프로그래머블 순차코오드 인식회로.
  2. 제1항에 있어서, 개별코오드 인식회로(10)의 개별코오드 수와같은 시프트레지스터(SR1,SR2,…SRM)를 순서적으로 연결하고 그 입력이 전단의 출력과 대응되는 개별코오드 인식회로(10)의 출력에 의하여 제어되는 것을 특징으로하는 프로그래머블 순차코오드 인식회로.
  3. 제1항에 있어서, 개별코오드 인식회로(10)는 프로그램 로직어레이의 로직소자들로 구성시켜 프로그램이 가능하도록 한 프로그래머블 순차코오드 인식회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880008954A 1988-07-18 1988-07-18 프로그래머블 순차코오드 인식회로 KR910005615B1 (ko)

Priority Applications (7)

Application Number Priority Date Filing Date Title
KR1019880008954A KR910005615B1 (ko) 1988-07-18 1988-07-18 프로그래머블 순차코오드 인식회로
US07/356,172 US5015886A (en) 1988-07-18 1989-05-24 Programmable sequential-code recognition circuit
DE3917945A DE3917945C2 (de) 1988-07-18 1989-06-01 Schaltung zum Erzeugen eines Betriebsartauswahlsignals
FR898907318A FR2634299B1 (fr) 1988-07-18 1989-06-02 Circuit de reconnaissance de codes sequentiels programmables
JP1139415A JP2551659B2 (ja) 1988-07-18 1989-06-02 半導体デバイスの動作モード選択回路
NL8901533A NL193258C (nl) 1988-07-18 1989-06-16 Keten voor het kiezen van een werkingsmodus.
GB8916398A GB2221072B (en) 1988-07-18 1989-07-18 Programmable sequential-code recognition circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019880008954A KR910005615B1 (ko) 1988-07-18 1988-07-18 프로그래머블 순차코오드 인식회로

Publications (2)

Publication Number Publication Date
KR900002574A true KR900002574A (ko) 1990-02-28
KR910005615B1 KR910005615B1 (ko) 1991-07-31

Family

ID=19276182

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880008954A KR910005615B1 (ko) 1988-07-18 1988-07-18 프로그래머블 순차코오드 인식회로

Country Status (7)

Country Link
US (1) US5015886A (ko)
JP (1) JP2551659B2 (ko)
KR (1) KR910005615B1 (ko)
DE (1) DE3917945C2 (ko)
FR (1) FR2634299B1 (ko)
GB (1) GB2221072B (ko)
NL (1) NL193258C (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100878663B1 (ko) * 2002-10-07 2009-01-15 주식회사 포스코 고효율 용강 정련방법

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0831529B2 (ja) * 1989-11-20 1996-03-27 株式会社東芝 半導体集積回路装置の論理プログラム方法
US5379404A (en) * 1990-03-16 1995-01-03 Motorola, Inc. Plug code for automatically recognizing and configuring both non-microprocessor and microprocessor based radio frequency communication devices
NL9001333A (nl) * 1990-06-13 1992-01-02 Philips Nv Werkwijze voor het besturen van een zelftest in een dataverwerkend systeem en dataverwerkend systeem geschikt voor deze werkwijze.
US5072137A (en) * 1990-08-17 1991-12-10 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with a clocked access code for test mode entry
US5161159A (en) * 1990-08-17 1992-11-03 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with multiple clocking for test mode entry
US5072138A (en) * 1990-08-17 1991-12-10 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with sequential clocked access codes for test mode entry
DE69120483T2 (de) * 1990-08-17 1996-11-14 Sgs Thomson Microelectronics Halbleiter-Speicher mit unterdrücktem Testmodus-Eingang während des Strom-Einschaltens
US5412260A (en) * 1991-05-03 1995-05-02 Lattice Semiconductor Corporation Multiplexed control pins for in-system programming and boundary scan state machines in a high density programmable logic device
US5237218A (en) * 1991-05-03 1993-08-17 Lattice Semiconductor Corporation Structure and method for multiplexing pins for in-system programming
US5471481A (en) * 1992-05-18 1995-11-28 Sony Corporation Testing method for electronic apparatus
EP0618530A1 (en) * 1993-03-30 1994-10-05 Koninklijke Philips Electronics N.V. Finite state machine with means for the reduction of noise effects
US5488318A (en) * 1994-10-04 1996-01-30 Texas Instruments Multifunction register
JPH09167483A (ja) * 1995-12-19 1997-06-24 Mitsubishi Electric Corp 動作モード設定回路
US7508943B2 (en) 2003-05-16 2009-03-24 Mo-Dv, Inc. Multimedia storage systems and methods
US8181703B2 (en) * 2003-05-16 2012-05-22 Halliburton Energy Services, Inc. Method useful for controlling fluid loss in subterranean formations
JP4321608B2 (ja) 2007-02-28 2009-08-26 ブラザー工業株式会社 シート搬送装置及び画像読取装置。
US9552855B2 (en) * 2009-06-26 2017-01-24 Mo-Dv, Inc. Accessing a serial number of a removable non-volatile memory device
US8751795B2 (en) 2010-09-14 2014-06-10 Mo-Dv, Inc. Secure transfer and tracking of data using removable non-volatile memory devices
KR20170007927A (ko) * 2015-07-13 2017-01-23 에스케이하이닉스 주식회사 반도체장치 및 반도체시스템
KR102375054B1 (ko) * 2015-12-11 2022-03-17 에스케이하이닉스 주식회사 테스트 모드 설정회로 및 이를 포함하는 반도체 장치

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3374466A (en) * 1965-05-10 1968-03-19 Ibm Data processing system
AU474461B2 (en) * 1972-06-30 1976-07-22 Notifier Company Method and apparatus for operating authorization control systems
US3839710A (en) * 1973-01-04 1974-10-01 Rusco Ind Inc Access apparatus control system
US3922508A (en) * 1974-01-14 1975-11-25 Magnetic Controls Co Coded telephone line testing equipment
CH622901A5 (ko) * 1977-10-11 1981-04-30 Fast Digital Syst
JPS5745944A (en) * 1980-09-02 1982-03-16 Toshiba Corp Semiconductor integrated circuit device
US4431991A (en) * 1981-10-13 1984-02-14 Motorola, Inc. Encoder for transmitted message deactivation code
US4427980A (en) * 1981-10-13 1984-01-24 Motorola, Inc. Encoder for transmitted message activation code
DE3232215A1 (de) * 1982-08-30 1984-03-01 Siemens AG, 1000 Berlin und 8000 München Monolithisch integrierte digitale halbleiterschaltung
EP0158311A3 (en) * 1984-04-06 1989-04-26 Nec Corporation Apparatus for retrieving character strings
EP0196171B1 (en) * 1985-03-23 1991-11-06 International Computers Limited Digital integrated circuits
US4802133A (en) * 1985-03-26 1989-01-31 Kabushiki Kaisha Toshiba Logic circuit
JPS61247984A (ja) * 1985-04-26 1986-11-05 Toshiba Corp テスト回路
GB8518859D0 (en) * 1985-07-25 1985-08-29 Int Computers Ltd Digital integrated circuits
JPS62182937A (ja) * 1986-02-07 1987-08-11 Toshiba Corp テストモ−ド設定回路
US4772811A (en) * 1986-07-04 1988-09-20 Ricoh Company, Ltd. Programmable logic device
US4873671A (en) * 1988-01-28 1989-10-10 National Semiconductor Corporation Sequential read access of serial memories with a user defined starting address

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100878663B1 (ko) * 2002-10-07 2009-01-15 주식회사 포스코 고효율 용강 정련방법

Also Published As

Publication number Publication date
DE3917945C2 (de) 1994-08-18
DE3917945A1 (de) 1990-01-25
KR910005615B1 (ko) 1991-07-31
NL193258C (nl) 1999-04-02
FR2634299B1 (fr) 1993-04-23
GB2221072A (en) 1990-01-24
JPH0247575A (ja) 1990-02-16
NL8901533A (nl) 1990-02-16
US5015886A (en) 1991-05-14
GB2221072B (en) 1992-04-08
NL193258B (nl) 1998-12-01
FR2634299A1 (fr) 1990-01-19
JP2551659B2 (ja) 1996-11-06
GB8916398D0 (en) 1989-09-06

Similar Documents

Publication Publication Date Title
KR900002574A (ko) 프로그래머블 순차코오드 인식회로
KR960702643A (ko) 동적 논리코어에 동적으로 상호접속된 필드 프로그램 가능 논리장치(field programmable logic device with dynamic interconnections to a dynamic logic core)
KR870009400A (ko) 검사하기에 용이한 반도체 lsi장치
KR830008282A (ko) 전자기기의 제어방법
KR880010573A (ko) 대규모 반도체 논리장치
KR890009092A (ko) 프로그램 가능 논리소자
KR890015151A (ko) 휴대가능전자장치
KR830009517A (ko) 기억된-프로그램 제어장치
KR880000966A (ko) 메모리셀 블록의 선택적 동작이 가능한 반도체 메모리 장치
KR890005534A (ko) Lsi/vlsi 검사 시스템용 분산 의사 무작위 순차 제어 시스템
DE69026200D1 (de) Programmierbares logisches Feld
KR880003248A (ko) 반도체 집적회로장치
ATE61176T1 (de) In integrierter technik hergestellter baustein zur erstellung integrierter schaltungen.
KR910017759A (ko) 순서동작형 논리회로 디바이스
US4037212A (en) Information processing system
KR850002641A (ko) 시프트 레지스터
ATE227467T1 (de) Schaltungsanordnung mit einer anzahl von elektronischen schaltungskomponenten
KR890016442A (ko) 전자시계용 집적회로 및 전자시계
KR880004651A (ko) 반도체 집적회로
KR900002177A (ko) 기호압축회로
KR940008248A (ko) 리세트회로
KR900700937A (ko) 래더 프로그램으로 동작할 수 있는 순서 제어기
RU1837275C (ru) Устройство дл ввода информации
KR910002023B1 (ko) 반도체 메모리 소자의 모드 선택회로
KR900015458A (ko) 입력절환장치

Legal Events

Date Code Title Description
A201 Request for examination
N231 Notification of change of applicant
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20070612

Year of fee payment: 17

EXPY Expiration of term