KR870009453A - 수지봉합형 반도체장치 - Google Patents

수지봉합형 반도체장치 Download PDF

Info

Publication number
KR870009453A
KR870009453A KR1019860006424A KR860006424A KR870009453A KR 870009453 A KR870009453 A KR 870009453A KR 1019860006424 A KR1019860006424 A KR 1019860006424A KR 860006424 A KR860006424 A KR 860006424A KR 870009453 A KR870009453 A KR 870009453A
Authority
KR
South Korea
Prior art keywords
resin
semiconductor device
sealed semiconductor
heat sink
mold layer
Prior art date
Application number
KR1019860006424A
Other languages
English (en)
Other versions
KR900001984B1 (ko
Inventor
도시히로 가토
신지로 고지마
다카오 에모토
Original Assignee
와타리 스기이찌로
가부시끼 가이샤 도오시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 와타리 스기이찌로, 가부시끼 가이샤 도오시바 filed Critical 와타리 스기이찌로
Publication of KR870009453A publication Critical patent/KR870009453A/ko
Application granted granted Critical
Publication of KR900001984B1 publication Critical patent/KR900001984B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49503Lead-frames or other flat leads characterised by the die pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49575Assemblies of semiconductor devices on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

내용 없음

Description

수지봉합형 반도체장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일실시예에 따른 수지봉합형 반도체 장치의 단면도.
제2도는 제1도 중 히트싱크의 일례를 나타내는 평면도.
제3도는 제1도중 리이드프레임의 일례를 나타내는 평면도.

Claims (4)

  1. 베드부(21)와 상기 베드부(21)의 표면위에 설치된 반도체 칩(4), 상기 반도체칩(4)의 내부 단자에 접합선(5)을 통해 접속된 리이드프레임(2), 상기 베드부(21)의 배면하측에 소정거리의 간극을 두고 설치된 금속제 히트싱크(1), 상기 반도체칩(4)과 베드부(21), 접합선(5), 리이드프레임(2) 선단부 및 히트싱크(1)를 봉합하는 수지모울드층(6)이 설치된 수지봉합형 반도체장치에 있어서,
    상기 베드부(21)는 기 배면에 오목부(7)가 형성되고, 상기 수지모울드층(6)이 상기 베드부(21)의 배면이 노출되도록 봉합하는 제1수지모울드층(61)과 상기 히트싱크(1)의 측면과 상기 제1수지모울드층(61)의 측면 및 상기 리이드프레임(2)의 중간부를 피복함과 더불어 상기 베드부(21)의 배면과 히트싱크(1)의 상면간의 간극에 채워져 형성된 제2수지모울드층(62)으로 형성된 것을 특징으로 하는 수지봉합형 반도체장치.
  2. 제1항에 있어서, 상기 히트싱크는 그 상면에 오목부(8)가 형성되어진 것을 특징으로 하는 수지봉합형 반도체장치.
  3. 제1항 또는 제2항에 있어서, 상기 오목부(7)(8)는 복수까가 산재하여 형성되어진 것을 특징으로 하는 수지봉합형 반도체장치.
  4. 제3항에 있어서, 상기 오목부(7)(8)는 압인가공이나 호인가공에의해 형성되어진 것을 특징으로 하는 수지봉합형 반도체장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019860006424A 1986-03-31 1986-08-04 수지봉합형 반도체장치 KR900001984B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP71134 1986-03-31
JP61071134A JPH0680748B2 (ja) 1986-03-31 1986-03-31 樹脂封止型半導体装置
JP61-71134 1986-03-31

Publications (2)

Publication Number Publication Date
KR870009453A true KR870009453A (ko) 1987-10-26
KR900001984B1 KR900001984B1 (ko) 1990-03-30

Family

ID=13451801

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860006424A KR900001984B1 (ko) 1986-03-31 1986-08-04 수지봉합형 반도체장치

Country Status (2)

Country Link
JP (1) JPH0680748B2 (ko)
KR (1) KR900001984B1 (ko)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2788011B2 (ja) * 1989-08-03 1998-08-20 三菱電機株式会社 半導体集積回路装置
US5172213A (en) * 1991-05-23 1992-12-15 At&T Bell Laboratories Molded circuit package having heat dissipating post
DE69637809D1 (de) * 1996-11-28 2009-02-26 Mitsubishi Electric Corp Halbleiteranordnung
JP3910144B2 (ja) * 2003-01-06 2007-04-25 シャープ株式会社 半導体発光装置およびその製造方法
JP5593864B2 (ja) * 2010-06-10 2014-09-24 トヨタ自動車株式会社 半導体装置冷却器
JP2012195497A (ja) * 2011-03-17 2012-10-11 Sumitomo Electric Ind Ltd 半導体装置及び半導体装置の製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57211761A (en) * 1981-06-23 1982-12-25 Nec Corp Semiconductor device
JPS58151035A (ja) * 1982-03-04 1983-09-08 Toshiba Corp 半導体装置の製造方法
JPS58153355A (ja) * 1982-03-08 1983-09-12 Toshiba Corp 樹脂封止型半導体装置
JPS6139555A (ja) * 1984-07-31 1986-02-25 Toshiba Corp 放熱板付樹脂封止形半導体装置

Also Published As

Publication number Publication date
KR900001984B1 (ko) 1990-03-30
JPH0680748B2 (ja) 1994-10-12
JPS62229961A (ja) 1987-10-08

Similar Documents

Publication Publication Date Title
KR920010853A (ko) 수지봉지형 반도체장치
KR950009988A (ko) 수지봉지형 반도체장치
KR880011939A (ko) 반도체 레이저의 조립방법
KR890007410A (ko) 반도체 장치
US4712127A (en) High reliability metal and resin container for a semiconductor device
KR910007094A (ko) 수지밀봉형 반도체장치
KR870009453A (ko) 수지봉합형 반도체장치
KR930011318A (ko) 반도체장치 및 그 제조방법
KR950021455A (ko) 수지 봉지형 반도체 장치
KR910001949A (ko) 무플래그 리드프레임, 피키지 및 방법
KR870000753A (ko) 수지봉합형 반도체장치
KR920007131A (ko) 반도체 장치
KR970008537A (ko) 연장된 리드를 갖는 리드 온 칩용 리드프레임
KR920010862A (ko) 반도체 장치 및 이것에 사용되는 리드프레임
KR970072361A (ko) Bga 반도체 패키지
KR970013255A (ko) 요홈이 형성된 리드프레임 패드 및 그를 이용한 칩 패키지
KR920010863A (ko) 반도체장치
KR900007093A (ko) 반도체 방열판 및 엔캡슐레이팅 방법과 리드프레임
KR910008830A (ko) 수지밀봉 반도체장치
KR970024106A (ko) 업셋 조정된 리드 프레임 및 그를 이용한 반도체 칩 패키지
KR970013277A (ko) 패키지를 불량 방지용 홈이 형성된 리드프레임
JPH0330430U (ko)
JPH0240940A (ja) 混成集積回路パッケージ
KR970024038A (ko) 그루브를 구비한 프레임 및 그를 이용한 반도체 패키지
KR970013288A (ko) 센터 패드(center pad)를 갖는 칩을 이용한 멀티칩 패키지

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20030228

Year of fee payment: 14

LAPS Lapse due to unpaid annual fee