KR20190027579A - 인쇄회로기판 - Google Patents

인쇄회로기판 Download PDF

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Publication number
KR20190027579A
KR20190027579A KR1020170114538A KR20170114538A KR20190027579A KR 20190027579 A KR20190027579 A KR 20190027579A KR 1020170114538 A KR1020170114538 A KR 1020170114538A KR 20170114538 A KR20170114538 A KR 20170114538A KR 20190027579 A KR20190027579 A KR 20190027579A
Authority
KR
South Korea
Prior art keywords
substrate
connection
connection pad
layer
posts
Prior art date
Application number
KR1020170114538A
Other languages
English (en)
Korean (ko)
Inventor
이재걸
박정환
Original Assignee
삼성전기주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전기주식회사 filed Critical 삼성전기주식회사
Priority to KR1020170114538A priority Critical patent/KR20190027579A/ko
Priority to JP2018074567A priority patent/JP6562483B2/ja
Priority to TW107113630A priority patent/TWI651990B/zh
Publication of KR20190027579A publication Critical patent/KR20190027579A/ko

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Combinations Of Printed Boards (AREA)
KR1020170114538A 2017-09-07 2017-09-07 인쇄회로기판 KR20190027579A (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020170114538A KR20190027579A (ko) 2017-09-07 2017-09-07 인쇄회로기판
JP2018074567A JP6562483B2 (ja) 2017-09-07 2018-04-09 プリント回路基板
TW107113630A TWI651990B (zh) 2017-09-07 2018-04-23 印刷電路板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020170114538A KR20190027579A (ko) 2017-09-07 2017-09-07 인쇄회로기판

Publications (1)

Publication Number Publication Date
KR20190027579A true KR20190027579A (ko) 2019-03-15

Family

ID=65762605

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020170114538A KR20190027579A (ko) 2017-09-07 2017-09-07 인쇄회로기판

Country Status (3)

Country Link
JP (1) JP6562483B2 (ja)
KR (1) KR20190027579A (ja)
TW (1) TWI651990B (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113133194B (zh) * 2020-01-16 2022-08-09 庆鼎精密电子(淮安)有限公司 电路板及其制造方法、显示屏

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20110066044A (ko) 2009-12-10 2011-06-16 엘지이노텍 주식회사 다층인쇄회로기판 및 그 제조방법

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07336045A (ja) * 1994-06-08 1995-12-22 Hitachi Chem Co Ltd 基板の接続方法
US7557452B1 (en) * 2000-06-08 2009-07-07 Micron Technology, Inc. Reinforced, self-aligning conductive structures for semiconductor device components and methods for fabricating same
EP1566993A4 (en) * 2002-11-27 2009-03-25 Sumitomo Bakelite Co PRINTED CIRCUIT BOARD, MULTILAYER WIRING PANEL, METHOD FOR MANUFACTURING CIRCUIT BOARD, AND METHOD FOR MANUFACTURING MULTILAYER WIRING PANEL
US7015590B2 (en) * 2003-01-10 2006-03-21 Samsung Electronics Co., Ltd. Reinforced solder bump structure and method for forming a reinforced solder bump
KR100567087B1 (ko) * 2003-10-20 2006-03-31 삼성전기주식회사 층간 전기 접속이 향상된 병렬적 다층 인쇄회로기판 제조방법
JP4528715B2 (ja) * 2005-11-25 2010-08-18 株式会社東芝 半導体装置及びその製造方法
JP5197942B2 (ja) * 2006-09-13 2013-05-15 富士通株式会社 コアレス多層配線基板および半導体装置、その製造方法
TWI393511B (zh) * 2007-05-29 2013-04-11 Panasonic Corp Dimensional printed wiring board and manufacturing method thereof
KR101098072B1 (ko) * 2008-03-10 2011-12-26 이비덴 가부시키가이샤 가요성 배선판 및 그의 제조 방법
FR2936359B1 (fr) * 2008-09-25 2010-10-22 Commissariat Energie Atomique Connexion par emboitement de deux inserts soudes.
TWI475932B (zh) * 2008-09-29 2015-03-01 Ngk Spark Plug Co 帶有補強材之配線基板
KR101095130B1 (ko) * 2009-12-01 2011-12-16 삼성전기주식회사 전자부품 내장형 인쇄회로기판 및 그 제조방법
US9230932B2 (en) * 2012-02-09 2016-01-05 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect crack arrestor structure and methods
US9553053B2 (en) * 2012-07-25 2017-01-24 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structure for yield improvement
JPWO2014033977A1 (ja) * 2012-08-29 2016-08-08 パナソニックIpマネジメント株式会社 半導体装置
US9406641B2 (en) * 2013-07-10 2016-08-02 Kinsus Interconnect Technology Corp. Compound carrier board structure of flip-chip chip-scale package and manufacturing method thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20110066044A (ko) 2009-12-10 2011-06-16 엘지이노텍 주식회사 다층인쇄회로기판 및 그 제조방법

Also Published As

Publication number Publication date
TWI651990B (zh) 2019-02-21
JP2019050348A (ja) 2019-03-28
JP6562483B2 (ja) 2019-08-21
TW201914380A (zh) 2019-04-01

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