KR20170110021A - 반도체 장치 - Google Patents

반도체 장치 Download PDF

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Publication number
KR20170110021A
KR20170110021A KR1020170033072A KR20170033072A KR20170110021A KR 20170110021 A KR20170110021 A KR 20170110021A KR 1020170033072 A KR1020170033072 A KR 1020170033072A KR 20170033072 A KR20170033072 A KR 20170033072A KR 20170110021 A KR20170110021 A KR 20170110021A
Authority
KR
South Korea
Prior art keywords
potential
mos transistor
gate
circuit
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020170033072A
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English (en)
Korean (ko)
Inventor
고지 다까야나기
Original Assignee
르네사스 일렉트로닉스 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 르네사스 일렉트로닉스 가부시키가이샤 filed Critical 르네사스 일렉트로닉스 가부시키가이샤
Publication of KR20170110021A publication Critical patent/KR20170110021A/ko
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018557—Coupling arrangements; Impedance matching circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/10—Modifications for increasing the maximum permissible switched voltage
    • H03K17/102—Modifications for increasing the maximum permissible switched voltage in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356182—Bistable circuits using complementary field-effect transistors with additional means for controlling the main nodes

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
KR1020170033072A 2016-03-22 2017-03-16 반도체 장치 Withdrawn KR20170110021A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016057403A JP6643157B2 (ja) 2016-03-22 2016-03-22 半導体装置
JPJP-P-2016-057403 2016-03-22

Publications (1)

Publication Number Publication Date
KR20170110021A true KR20170110021A (ko) 2017-10-10

Family

ID=59896988

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020170033072A Withdrawn KR20170110021A (ko) 2016-03-22 2017-03-16 반도체 장치

Country Status (5)

Country Link
US (2) US9948283B2 (enExample)
JP (1) JP6643157B2 (enExample)
KR (1) KR20170110021A (enExample)
CN (1) CN107222196B (enExample)
TW (1) TW201742378A (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11101799B2 (en) * 2017-05-24 2021-08-24 SK Hynix Inc. Voltage driving circuit
JP7114268B2 (ja) * 2018-02-20 2022-08-08 ルネサスエレクトロニクス株式会社 半導体装置
JP6952619B2 (ja) * 2018-02-21 2021-10-20 ルネサスエレクトロニクス株式会社 半導体装置
JP7152681B2 (ja) * 2018-06-19 2022-10-13 株式会社ソシオネクスト 半導体集積回路装置およびレベルシフタ回路
US10637446B1 (en) * 2019-06-24 2020-04-28 Sandisk Technologies Llc Dual voltage range CMOS receiver
CN112671391B (zh) * 2020-12-21 2023-04-18 海光信息技术股份有限公司 一种电平转换电路
CN112383298B (zh) * 2021-01-18 2021-06-11 灿芯半导体(上海)股份有限公司 一种ddr发送电路
TWI770999B (zh) * 2021-05-12 2022-07-11 友達光電股份有限公司 電壓調變電路及其操作方法
US11881847B2 (en) * 2021-09-14 2024-01-23 Mediatek Inc. Post driver and chip with overdrive capability
KR20230040754A (ko) 2021-09-16 2023-03-23 삼성전자주식회사 복수의 바이어스 전압들에 기초하여 출력 전압을 생성하는 출력 드라이빙 회로 및 이의 동작 방법
WO2023062741A1 (ja) * 2021-10-13 2023-04-20 株式会社ソシオネクスト 出力回路
JP2024000133A (ja) 2022-06-20 2024-01-05 ルネサスエレクトロニクス株式会社 半導体装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5465054A (en) * 1994-04-08 1995-11-07 Vivid Semiconductor, Inc. High voltage CMOS logic using low voltage CMOS process
DE69531032T2 (de) 1994-09-21 2003-11-27 Nec Electronics Corp., Kawasaki Spannungspegel-Verschiebungsschaltung
JP2842329B2 (ja) * 1994-09-21 1999-01-06 日本電気株式会社 電圧レベルシフト回路
JP3755911B2 (ja) * 1994-11-15 2006-03-15 富士通株式会社 半導体回路
JP2993462B2 (ja) * 1997-04-18 1999-12-20 日本電気株式会社 出力バッファ回路
US7224195B2 (en) * 2003-12-11 2007-05-29 Integrated Device Technology, Inc. Output drive circuit that accommodates variable supply voltages
JP4676507B2 (ja) * 2008-02-21 2011-04-27 Ｏｋｉセミコンダクタ株式会社 負荷容量の駆動回路
CN102160288B (zh) * 2008-12-29 2014-07-02 艾格瑞系统有限公司 电压电平转换器电路
TWI374611B (en) * 2009-04-03 2012-10-11 Univ Nat Sun Yat Sen I/o buffer with twice supply voltage tolerance using normal supply voltage devices
GB2469634B (en) * 2009-04-20 2015-11-11 Advanced Risc Mach Ltd Input-output device protection
CN102075176B (zh) * 2011-01-13 2013-11-27 威盛电子股份有限公司 电位转换电路
TWI463600B (zh) * 2011-03-02 2014-12-01 Global Unichip Corp 二級式後端驅動器
JP5978629B2 (ja) * 2012-01-20 2016-08-24 凸版印刷株式会社 半導体集積回路
KR101989571B1 (ko) * 2012-06-27 2019-06-14 삼성전자주식회사 고전압 및 와이드 랜지 전압 동작을 위한 출력 드라이버 및 그것을 사용한 데이터 출력 드라이빙 회로
US9837161B2 (en) * 2016-03-09 2017-12-05 Nxp Usa, Inc. Split-gate memory having sector retirement with reduced current and method therefor

Also Published As

Publication number Publication date
US9948283B2 (en) 2018-04-17
CN107222196B (zh) 2023-06-27
US10236868B2 (en) 2019-03-19
CN107222196A (zh) 2017-09-29
US20170279438A1 (en) 2017-09-28
JP6643157B2 (ja) 2020-02-12
TW201742378A (zh) 2017-12-01
US20180269860A1 (en) 2018-09-20
JP2017175288A (ja) 2017-09-28

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Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20170316

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination