KR20130140643A - 중합체성 충전재 트렌치를 갖는 반도체 칩 디바이스 - Google Patents

중합체성 충전재 트렌치를 갖는 반도체 칩 디바이스 Download PDF

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Publication number
KR20130140643A
KR20130140643A KR1020137007012A KR20137007012A KR20130140643A KR 20130140643 A KR20130140643 A KR 20130140643A KR 1020137007012 A KR1020137007012 A KR 1020137007012A KR 20137007012 A KR20137007012 A KR 20137007012A KR 20130140643 A KR20130140643 A KR 20130140643A
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South Korea
Prior art keywords
semiconductor chip
trench
insulating layer
polymeric filler
solder
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Korean (ko)
Inventor
마이클 제트. 수
자말 레파이-아메드
브라이언 블랙
Original Assignee
어드밴스드 마이크로 디바이시즈, 인코포레이티드
에이티아이 테크놀로지스 유엘씨
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Application filed by 어드밴스드 마이크로 디바이시즈, 인코포레이티드, 에이티아이 테크놀로지스 유엘씨 filed Critical 어드밴스드 마이크로 디바이시즈, 인코포레이티드
Publication of KR20130140643A publication Critical patent/KR20130140643A/ko
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    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • H—ELECTRICITY
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    • H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
    • H10W76/42—Fillings
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    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
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    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
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    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
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    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
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    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
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    • H10W74/47—Encapsulations, e.g. protective coatings characterised by their materials comprising organic materials, e.g. plastics or resins
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    • H10W74/47—Encapsulations, e.g. protective coatings characterised by their materials comprising organic materials, e.g. plastics or resins
    • H10W74/473—Encapsulations, e.g. protective coatings characterised by their materials comprising organic materials, e.g. plastics or resins containing a filler
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    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
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    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
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    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/698—Semiconductor materials that are electrically insulating, e.g. undoped silicon
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    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07311—Treating the bonding area before connecting, e.g. by applying flux or cleaning
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
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    • H10W72/853—On the same surface
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/877—Bump connectors and die-attach connectors
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    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
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    • H10W90/20—Configurations of stacked chips
    • H10W90/26—Configurations of stacked chips the stacked chips being of the same size without any chips being laterally offset, e.g. chip stacks having a rectangular shape
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    • H10W90/28—Configurations of stacked chips the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape
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    • H10W90/288—Configurations of stacked chips characterised by arrangements for thermal management of the stacked chips
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    • H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
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    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
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    • H10W90/00—Package configurations
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    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
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    • H10W90/00—Package configurations
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    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Element Separation (AREA)
  • Dicing (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
KR1020137007012A 2010-09-09 2011-09-09 중합체성 충전재 트렌치를 갖는 반도체 칩 디바이스 Ceased KR20130140643A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/878,795 2010-09-09
US12/878,795 US8617926B2 (en) 2010-09-09 2010-09-09 Semiconductor chip device with polymeric filler trench
PCT/US2011/051058 WO2012034052A1 (en) 2010-09-09 2011-09-09 Semiconductor chip device with polymeric filler trench

Publications (1)

Publication Number Publication Date
KR20130140643A true KR20130140643A (ko) 2013-12-24

Family

ID=44654508

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Application Number Title Priority Date Filing Date
KR1020137007012A Ceased KR20130140643A (ko) 2010-09-09 2011-09-09 중합체성 충전재 트렌치를 갖는 반도체 칩 디바이스

Country Status (7)

Country Link
US (2) US8617926B2 (enExample)
EP (1) EP2614522B1 (enExample)
JP (1) JP2013537365A (enExample)
KR (1) KR20130140643A (enExample)
CN (1) CN103119702A (enExample)
IN (1) IN2013DN02549A (enExample)
WO (1) WO2012034052A1 (enExample)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012069734A (ja) * 2010-09-24 2012-04-05 Toshiba Corp 半導体装置の製造方法
US8952540B2 (en) * 2011-06-30 2015-02-10 Intel Corporation In situ-built pin-grid arrays for coreless substrates, and methods of making same
US8704353B2 (en) 2012-03-30 2014-04-22 Advanced Micro Devices, Inc. Thermal management of stacked semiconductor chips with electrically non-functional interconnects
US9070656B2 (en) * 2013-06-12 2015-06-30 Micron Technology, Inc. Underfill-accommodating heat spreaders and related semiconductor device assemblies and methods
US20150262902A1 (en) 2014-03-12 2015-09-17 Invensas Corporation Integrated circuits protected by substrates with cavities, and methods of manufacture
US9355997B2 (en) 2014-03-12 2016-05-31 Invensas Corporation Integrated circuit assemblies with reinforcement frames, and methods of manufacture
US10020236B2 (en) * 2014-03-14 2018-07-10 Taiwan Semiconductar Manufacturing Campany Dam for three-dimensional integrated circuit
US9165793B1 (en) 2014-05-02 2015-10-20 Invensas Corporation Making electrical components in handle wafers of integrated circuit packages
US9741649B2 (en) 2014-06-04 2017-08-22 Invensas Corporation Integrated interposer solutions for 2D and 3D IC packaging
US9412806B2 (en) 2014-06-13 2016-08-09 Invensas Corporation Making multilayer 3D capacitors using arrays of upstanding rods or ridges
US9252127B1 (en) 2014-07-10 2016-02-02 Invensas Corporation Microelectronic assemblies with integrated circuits and interposers with cavities, and methods of manufacture
US9478504B1 (en) 2015-06-19 2016-10-25 Invensas Corporation Microelectronic assemblies with cavities, and methods of fabrication
CN107548573A (zh) * 2015-07-31 2018-01-05 惠普发展公司，有限责任合伙企业 印刷电路板至模制化合物的接合部
US10546796B2 (en) 2016-02-18 2020-01-28 Apple Inc. Backplane structure and process for microdriver and micro LED
US20180005916A1 (en) * 2016-06-30 2018-01-04 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacturing method thereof
US9837333B1 (en) * 2016-09-21 2017-12-05 International Business Machines Corporation Electronic package cover having underside rib
CN108022845B (zh) * 2016-11-02 2020-06-26 中芯国际集成电路制造(上海)有限公司 芯片封装方法及封装结构
US10861763B2 (en) 2016-11-26 2020-12-08 Texas Instruments Incorporated Thermal routing trench by additive processing
US11676880B2 (en) 2016-11-26 2023-06-13 Texas Instruments Incorporated High thermal conductivity vias by additive processing
US10529641B2 (en) 2016-11-26 2020-01-07 Texas Instruments Incorporated Integrated circuit nanoparticle thermal routing structure over interconnect region
US10256188B2 (en) 2016-11-26 2019-04-09 Texas Instruments Incorporated Interconnect via with grown graphitic material
US10811334B2 (en) 2016-11-26 2020-10-20 Texas Instruments Incorporated Integrated circuit nanoparticle thermal routing structure in interconnect region
US11004680B2 (en) 2016-11-26 2021-05-11 Texas Instruments Incorporated Semiconductor device package thermal conduit
US10607857B2 (en) 2017-12-06 2020-03-31 Indium Corporation Semiconductor device assembly including a thermal interface bond between a semiconductor die and a passive heat exchanger
US11031317B2 (en) * 2019-10-09 2021-06-08 Toyota Motor Engineering & Manufacturing North America, Inc. Direct bonded metal substrates with encapsulated phase change materials and electronic assemblies incorporating the same
US12074099B2 (en) * 2021-05-07 2024-08-27 Materion Corporation Microelectronics package assemblies and processes for making
DE112023004553T5 (de) 2022-10-31 2025-08-14 KYOCERA AVX Components Corporation Mehrschichtiger Kondensator
US12482719B2 (en) * 2022-12-27 2025-11-25 Nxp Usa, Inc. Low-stress thermal interface
CN116207198B (zh) * 2023-02-02 2026-02-03 厦门乾照光电股份有限公司 Micro-LED芯片及其制备方法

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6291264B1 (en) 2000-07-31 2001-09-18 Siliconware Precision Industries Co., Ltd. Flip-chip package structure and method of fabricating the same
US6472758B1 (en) 2000-07-20 2002-10-29 Amkor Technology, Inc. Semiconductor package including stacked semiconductor dies and bond wires
JP3857574B2 (ja) * 2001-11-21 2006-12-13 富士通株式会社 半導体装置及びその製造方法
US6753613B2 (en) 2002-03-13 2004-06-22 Intel Corporation Stacked dice standoffs
JP3925283B2 (ja) * 2002-04-16 2007-06-06 セイコーエプソン株式会社 電子デバイスの製造方法、電子機器の製造方法
JP2003324182A (ja) * 2002-04-30 2003-11-14 Fujitsu Ltd フリップチップ接合方法及びフリップチップ接合構造
US6933221B1 (en) 2002-06-24 2005-08-23 Micron Technology, Inc. Method for underfilling semiconductor components using no flow underfill
US6906415B2 (en) 2002-06-27 2005-06-14 Micron Technology, Inc. Semiconductor device assemblies and packages including multiple semiconductor devices and methods
JP4260617B2 (ja) 2003-12-24 2009-04-30 株式会社ルネサステクノロジ 半導体装置の製造方法
US7122906B2 (en) 2004-01-29 2006-10-17 Micron Technology, Inc. Die-wafer package and method of fabricating same
US7095105B2 (en) 2004-03-23 2006-08-22 Texas Instruments Incorporated Vertically stacked semiconductor device
US7223638B2 (en) * 2004-05-13 2007-05-29 Intel Corporation Microelectronic assembly having a thermally conductive member with a cavity to contain a portion of a thermal interface material
JP2005353420A (ja) * 2004-06-10 2005-12-22 Sony Corp 導電性材料、導電性材料担持シート、導電性材料の充填方法及び装置
KR100570514B1 (ko) 2004-06-18 2006-04-13 삼성전자주식회사 웨이퍼 레벨 칩 스택 패키지 제조 방법
US7239517B2 (en) * 2005-04-11 2007-07-03 Intel Corporation Integrated heat spreader and method for using
JP4764159B2 (ja) * 2005-12-20 2011-08-31 富士通セミコンダクター株式会社 半導体装置
JP4760361B2 (ja) * 2005-12-20 2011-08-31 ソニー株式会社 半導体装置
US7863727B2 (en) 2006-02-06 2011-01-04 Micron Technology, Inc. Microelectronic devices and methods for manufacturing microelectronic devices
US20070200234A1 (en) 2006-02-28 2007-08-30 Texas Instruments Incorporated Flip-Chip Device Having Underfill in Controlled Gap
JP2007234988A (ja) * 2006-03-02 2007-09-13 Epson Toyocom Corp 半導体素子の実装基板及び実装方法
JP4910439B2 (ja) * 2006-03-23 2012-04-04 富士通セミコンダクター株式会社 半導体装置
CN101578695B (zh) * 2006-12-26 2012-06-13 松下电器产业株式会社 半导体元件的安装结构体及半导体元件的安装方法
US20080169555A1 (en) 2007-01-16 2008-07-17 Ati Technologies Ulc Anchor structure for an integrated circuit
JP2008235655A (ja) * 2007-03-22 2008-10-02 Hitachi Aic Inc 基板及びこの基板の製造方法
JP2009277334A (ja) * 2008-04-14 2009-11-26 Hitachi Ltd 情報処理装置および半導体記憶装置
JP2010021347A (ja) * 2008-07-10 2010-01-28 Oki Semiconductor Co Ltd 多層チップ型半導体装置及びその製造方法

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CN103119702A (zh) 2013-05-22
US20140103506A1 (en) 2014-04-17
US8866276B2 (en) 2014-10-21
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IN2013DN02549A (enExample) 2015-08-07
JP2013537365A (ja) 2013-09-30

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