KR20050026995A - 반도체 장치 및 그 제조방법 - Google Patents

반도체 장치 및 그 제조방법 Download PDF

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Publication number
KR20050026995A
KR20050026995A KR1020040059025A KR20040059025A KR20050026995A KR 20050026995 A KR20050026995 A KR 20050026995A KR 1020040059025 A KR1020040059025 A KR 1020040059025A KR 20040059025 A KR20040059025 A KR 20040059025A KR 20050026995 A KR20050026995 A KR 20050026995A
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KR
South Korea
Prior art keywords
layer
semiconductor
misfet
silicide
conductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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KR1020040059025A
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English (en)
Korean (ko)
Inventor
니시다아키오
이치노세카즈히토
차키하라히라쿠
Original Assignee
가부시끼가이샤 르네사스 테크놀로지
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Publication of KR20050026995A publication Critical patent/KR20050026995A/ko
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00Three-dimensional [3D] integrated devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335Making a connection between the transistor and the capacitor, e.g. plug
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48Data lines or contacts therefor
    • H10B12/485Bit line contacts

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020040059025A 2003-09-11 2004-07-28 반도체 장치 및 그 제조방법 Withdrawn KR20050026995A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2003-00319727 2003-09-11
JP2003319727A JP4606006B2 (ja) 2003-09-11 2003-09-11 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
KR20050026995A true KR20050026995A (ko) 2005-03-17

Family

ID=34269882

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020040059025A Withdrawn KR20050026995A (ko) 2003-09-11 2004-07-28 반도체 장치 및 그 제조방법

Country Status (3)

Country Link
US (1) US7179737B2 (enExample)
JP (1) JP4606006B2 (enExample)
KR (1) KR20050026995A (enExample)

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US7772048B2 (en) * 2007-02-23 2010-08-10 Freescale Semiconductor, Inc. Forming semiconductor fins using a sacrificial fin
KR101320518B1 (ko) * 2007-10-24 2013-12-19 삼성전자주식회사 적층 레벨의 트랜지스터들을 갖는 집적 회로 반도체 소자및 그 제조방법
US7772114B2 (en) * 2007-12-05 2010-08-10 Novellus Systems, Inc. Method for improving uniformity and adhesion of low resistivity tungsten film
US8053365B2 (en) 2007-12-21 2011-11-08 Novellus Systems, Inc. Methods for forming all tungsten contacts and lines
US8062977B1 (en) 2008-01-31 2011-11-22 Novellus Systems, Inc. Ternary tungsten-containing resistive thin films
US8058170B2 (en) 2008-06-12 2011-11-15 Novellus Systems, Inc. Method for depositing thin tungsten film with low resistivity and robust micro-adhesion characteristics
US8803245B2 (en) 2008-06-30 2014-08-12 Mcafee, Inc. Method of forming stacked trench contacts and structures formed thereby
US8551885B2 (en) * 2008-08-29 2013-10-08 Novellus Systems, Inc. Method for reducing tungsten roughness and improving reflectivity
JP5526529B2 (ja) * 2008-11-18 2014-06-18 株式会社ニコン 積層半導体装置及び積層半導体装置の製造方法
KR101561059B1 (ko) 2008-11-20 2015-10-16 삼성전자주식회사 반도체 소자 및 그 제조 방법
US20100267230A1 (en) * 2009-04-16 2010-10-21 Anand Chandrashekar Method for forming tungsten contacts and interconnects with small critical dimensions
US9159571B2 (en) 2009-04-16 2015-10-13 Lam Research Corporation Tungsten deposition process using germanium-containing reducing agent
US10256142B2 (en) 2009-08-04 2019-04-09 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US8207062B2 (en) * 2009-09-09 2012-06-26 Novellus Systems, Inc. Method for improving adhesion of low resistivity tungsten/tungsten nitride layers
US8709948B2 (en) * 2010-03-12 2014-04-29 Novellus Systems, Inc. Tungsten barrier and seed for copper filled TSV
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US11437269B2 (en) 2012-03-27 2022-09-06 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US10381266B2 (en) 2012-03-27 2019-08-13 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
JP6273257B2 (ja) 2012-03-27 2018-01-31 ノベラス・システムズ・インコーポレーテッドNovellus Systems Incorporated タングステンによるフィーチャ充填
US9034760B2 (en) 2012-06-29 2015-05-19 Novellus Systems, Inc. Methods of forming tensile tungsten films and compressive tungsten films
US8975184B2 (en) 2012-07-27 2015-03-10 Novellus Systems, Inc. Methods of improving tungsten contact resistance in small critical dimension features
US8853080B2 (en) 2012-09-09 2014-10-07 Novellus Systems, Inc. Method for depositing tungsten film with low roughness and low resistivity
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US9153486B2 (en) 2013-04-12 2015-10-06 Lam Research Corporation CVD based metal/semiconductor OHMIC contact for high volume manufacturing applications
US9589808B2 (en) 2013-12-19 2017-03-07 Lam Research Corporation Method for depositing extremely low resistivity tungsten
US9748137B2 (en) 2014-08-21 2017-08-29 Lam Research Corporation Method for void-free cobalt gap fill
US9349637B2 (en) 2014-08-21 2016-05-24 Lam Research Corporation Method for void-free cobalt gap fill
US9997405B2 (en) 2014-09-30 2018-06-12 Lam Research Corporation Feature fill with nucleation inhibition
US9953984B2 (en) 2015-02-11 2018-04-24 Lam Research Corporation Tungsten for wordline applications
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US10170320B2 (en) 2015-05-18 2019-01-01 Lam Research Corporation Feature fill with multi-stage nucleation inhibition
US9613818B2 (en) 2015-05-27 2017-04-04 Lam Research Corporation Deposition of low fluorine tungsten by sequential CVD process
US9754824B2 (en) 2015-05-27 2017-09-05 Lam Research Corporation Tungsten films having low fluorine content
US9978605B2 (en) 2015-05-27 2018-05-22 Lam Research Corporation Method of forming low resistivity fluorine free tungsten film without nucleation
US10573522B2 (en) 2016-08-16 2020-02-25 Lam Research Corporation Method for preventing line bending during metal fill process
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CN113424300B (zh) 2018-12-14 2025-05-09 朗姆研究公司 在3d nand结构上的原子层沉积
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KR20220047333A (ko) 2019-08-12 2022-04-15 램 리써치 코포레이션 텅스텐 증착
KR20220004253A (ko) * 2020-07-03 2022-01-11 에스케이하이닉스 주식회사 반도체장치 및 그 제조 방법
US12266570B2 (en) * 2020-12-23 2025-04-01 Intel Corporation Self-aligned interconnect structures and methods of fabrication
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Also Published As

Publication number Publication date
JP2005086157A (ja) 2005-03-31
US7179737B2 (en) 2007-02-20
JP4606006B2 (ja) 2011-01-05
US20050059236A1 (en) 2005-03-17

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PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20040728

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid