KR20010098593A - 반도체 장치 및 그 제조 방법 - Google Patents

반도체 장치 및 그 제조 방법 Download PDF

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Publication number
KR20010098593A
KR20010098593A KR1020010019864A KR20010019864A KR20010098593A KR 20010098593 A KR20010098593 A KR 20010098593A KR 1020010019864 A KR1020010019864 A KR 1020010019864A KR 20010019864 A KR20010019864 A KR 20010019864A KR 20010098593 A KR20010098593 A KR 20010098593A
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KR
South Korea
Prior art keywords
film
metal
silicon
tungsten
silicide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1020010019864A
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English (en)
Korean (ko)
Inventor
오니시가즈히로
야마모또나오끼
Original Assignee
가나이 쓰토무
가부시키가이샤 히타치세이사쿠쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 가나이 쓰토무, 가부시키가이샤 히타치세이사쿠쇼 filed Critical 가나이 쓰토무
Publication of KR20010098593A publication Critical patent/KR20010098593A/ko
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H10D64/664—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a barrier layer between the layer of silicon and an upper metal or metal silicide layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0174—Manufacturing their gate conductors the gate conductors being silicided
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR1020010019864A 2000-04-14 2001-04-13 반도체 장치 및 그 제조 방법 Ceased KR20010098593A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000-118491 2000-04-14
JP2000118491A JP2001298186A (ja) 2000-04-14 2000-04-14 半導体装置およびその製造方法

Publications (1)

Publication Number Publication Date
KR20010098593A true KR20010098593A (ko) 2001-11-08

Family

ID=18629618

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020010019864A Ceased KR20010098593A (ko) 2000-04-14 2001-04-13 반도체 장치 및 그 제조 방법

Country Status (4)

Country Link
US (3) US6750503B2 (enExample)
JP (1) JP2001298186A (enExample)
KR (1) KR20010098593A (enExample)
TW (1) TW492186B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7534709B2 (en) 2003-05-29 2009-05-19 Samsung Electronics Co., Ltd. Semiconductor device and method of manufacturing the same

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JP4651848B2 (ja) * 2000-07-21 2011-03-16 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法並びにｃｍｏｓトランジスタ
JP4926329B2 (ja) * 2001-03-27 2012-05-09 株式会社半導体エネルギー研究所 半導体装置およびその作製方法、電気器具
US7132698B2 (en) * 2002-01-25 2006-11-07 International Rectifier Corporation Compression assembled electronic package having a plastic molded insulation ring
US7084423B2 (en) 2002-08-12 2006-08-01 Acorn Technologies, Inc. Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
US6833556B2 (en) 2002-08-12 2004-12-21 Acorn Technologies, Inc. Insulated gate field effect transistor having passivated schottky barriers to the channel
US6902993B2 (en) * 2003-03-28 2005-06-07 Cypress Semiconductor Corporation Gate electrode for MOS transistors
JP2004319722A (ja) 2003-04-16 2004-11-11 Hitachi Ltd 半導体集積回路装置およびその製造方法
KR100693878B1 (ko) 2004-12-08 2007-03-12 삼성전자주식회사 낮은 저항을 갖는 반도체 장치 및 그 제조 방법
US7183221B2 (en) * 2003-11-06 2007-02-27 Texas Instruments Incorporated Method of fabricating a semiconductor having dual gate electrodes using a composition-altered metal layer
US20050124127A1 (en) * 2003-12-04 2005-06-09 Tzu-En Ho Method for manufacturing gate structure for use in semiconductor device
DE102004004864B4 (de) * 2004-01-30 2008-09-11 Qimonda Ag Verfahren zur Herstellung einer Gate-Struktur und Gate-Struktur für einen Transistor
JP2005327848A (ja) * 2004-05-13 2005-11-24 Toshiba Corp 半導体装置及びその製造方法
KR100681211B1 (ko) * 2005-06-30 2007-02-09 주식회사 하이닉스반도체 이중 확산방지막을 갖는 게이트전극 및 그를 구비한반도체소자의 제조 방법
KR100655658B1 (ko) * 2005-07-26 2006-12-08 삼성전자주식회사 게이트 전극 구조물과 그 제조 방법 및 이를 갖는 반도체트랜지스터와 그 제조 방법
KR100654358B1 (ko) * 2005-08-10 2006-12-08 삼성전자주식회사 반도체 집적 회로 장치와 그 제조 방법
KR100642761B1 (ko) * 2005-09-07 2006-11-10 삼성전자주식회사 반도체 소자 및 그 제조 방법
KR100694660B1 (ko) * 2006-03-08 2007-03-13 삼성전자주식회사 트랜지스터 및 그 제조 방법
JP4327820B2 (ja) * 2006-06-05 2009-09-09 株式会社東芝 半導体装置およびその製造方法
KR100914283B1 (ko) * 2006-12-28 2009-08-27 주식회사 하이닉스반도체 반도체소자의 폴리메탈게이트 형성방법
JP4575400B2 (ja) * 2007-05-08 2010-11-04 株式会社東芝 半導体装置の製造方法
KR20100100178A (ko) * 2009-03-05 2010-09-15 삼성전자주식회사 반도체 소자
DE112012004882B4 (de) 2011-11-23 2022-12-29 Acorn Technologies, Inc. Verbesserung von Metallkontakten zu Gruppe-IV-Halbleitern durch Einfügung grenzflächiger atomischer Monoschichten
KR20140007609A (ko) * 2012-07-09 2014-01-20 삼성전자주식회사 반도체 장치의 제조방법
JP2014053557A (ja) * 2012-09-10 2014-03-20 Toshiba Corp 半導体装置およびその製造方法
US20170054032A1 (en) * 2015-01-09 2017-02-23 SanDisk Technologies, Inc. Non-volatile memory having individually optimized silicide contacts and process therefor
US9620611B1 (en) 2016-06-17 2017-04-11 Acorn Technology, Inc. MIS contact structure with metal oxide conductor
US10170627B2 (en) 2016-11-18 2019-01-01 Acorn Technologies, Inc. Nanowire transistor with source and drain induced by electrical contacts with negative schottky barrier height
CN108807163A (zh) * 2017-06-05 2018-11-13 长鑫存储技术有限公司 一种半导体器件结构及其制备方法
JP6896305B2 (ja) * 2017-11-09 2021-06-30 国立研究開発法人産業技術総合研究所 半導体装置及びその製造方法

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US5010032A (en) * 1985-05-01 1991-04-23 Texas Instruments Incorporated Process for making CMOS device with both P+ and N+ gates including refractory metal silicide and nitride interconnects
US6291868B1 (en) * 1998-02-26 2001-09-18 Micron Technology, Inc. Forming a conductive structure in a semiconductor device
US6265297B1 (en) * 1999-09-01 2001-07-24 Micron Technology, Inc. Ammonia passivation of metal gate electrodes to inhibit oxidation of metal
US20020008294A1 (en) 2000-07-21 2002-01-24 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and method for manufacturing same
KR100351907B1 (ko) 2000-11-17 2002-09-12 주식회사 하이닉스반도체 반도체 소자의 게이트 전극 형성방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7534709B2 (en) 2003-05-29 2009-05-19 Samsung Electronics Co., Ltd. Semiconductor device and method of manufacturing the same

Also Published As

Publication number Publication date
TW492186B (en) 2002-06-21
US20010030342A1 (en) 2001-10-18
US20050164441A1 (en) 2005-07-28
US6750503B2 (en) 2004-06-15
JP2001298186A (ja) 2001-10-26
US20040178440A1 (en) 2004-09-16

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