KR102037655B1 - 반도체 장치의 제조 방법 - Google Patents

반도체 장치의 제조 방법 Download PDF

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Publication number
KR102037655B1
KR102037655B1 KR1020180035574A KR20180035574A KR102037655B1 KR 102037655 B1 KR102037655 B1 KR 102037655B1 KR 1020180035574 A KR1020180035574 A KR 1020180035574A KR 20180035574 A KR20180035574 A KR 20180035574A KR 102037655 B1 KR102037655 B1 KR 102037655B1
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KR
South Korea
Prior art keywords
resin
groove
manufacturing
thin film
substrate
Prior art date
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KR1020180035574A
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English (en)
Korean (ko)
Other versions
KR20190043444A (ko
Inventor
요시히로 마루가메
Original Assignee
미쓰비시덴키 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication of KR20190043444A publication Critical patent/KR20190043444A/ko
Application granted granted Critical
Publication of KR102037655B1 publication Critical patent/KR102037655B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67126—Apparatus for sealing, encapsulating, glassing, decapsulating or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
KR1020180035574A 2017-10-18 2018-03-28 반도체 장치의 제조 방법 KR102037655B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2017-201883 2017-10-18
JP2017201883A JP6981168B2 (ja) 2017-10-18 2017-10-18 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR20190043444A KR20190043444A (ko) 2019-04-26
KR102037655B1 true KR102037655B1 (ko) 2019-10-29

Family

ID=66281199

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020180035574A KR102037655B1 (ko) 2017-10-18 2018-03-28 반도체 장치의 제조 방법

Country Status (3)

Country Link
JP (1) JP6981168B2 (ja)
KR (1) KR102037655B1 (ja)
TW (1) TWI654692B (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111623016B (zh) * 2020-06-16 2021-01-29 苏州鸿凌达电子科技有限公司 一种高功率石墨膜包边、压边裁切一体化模具及设备
CN114520169A (zh) * 2022-01-14 2022-05-20 苏州通富超威半导体有限公司 一种半导体封装治具及其应用

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008227317A (ja) 2007-03-15 2008-09-25 Matsushita Electric Ind Co Ltd 半導体装置、そのための配線基板、封止金型、および製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10144713A (ja) * 1996-11-15 1998-05-29 Hitachi Ltd モールド方法および装置ならびに半導体装置
JPH1147903A (ja) * 1997-07-30 1999-02-23 Asahi Denso Kk ダイカスト金型のガス抜き構造
JP2000260795A (ja) * 1999-03-09 2000-09-22 Nec Corp 樹脂封止半導体装置用基板及び樹脂封止半導体装置
JP3660861B2 (ja) 2000-08-18 2005-06-15 株式会社ルネサステクノロジ 半導体装置の製造方法
JP2003077946A (ja) * 2001-08-31 2003-03-14 Hitachi Ltd 半導体装置の製造方法
US7042072B1 (en) * 2002-08-02 2006-05-09 Amkor Technology, Inc. Semiconductor package and method of manufacturing the same which reduces warpage
JP4243177B2 (ja) 2003-12-22 2009-03-25 株式会社ルネサステクノロジ 半導体装置の製造方法
US20090026656A1 (en) 2007-07-23 2009-01-29 Bautista Jr Jesus Bajo Vented mold for encapsulating semiconductor components
JP2011204786A (ja) * 2010-03-24 2011-10-13 Renesas Electronics Corp 半導体装置の製造方法
JP5562874B2 (ja) 2011-01-12 2014-07-30 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2015012061A (ja) * 2013-06-27 2015-01-19 株式会社デンソー 電子装置およびその電子装置の製造方法
JP6499105B2 (ja) 2016-03-11 2019-04-10 東芝メモリ株式会社 金型

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008227317A (ja) 2007-03-15 2008-09-25 Matsushita Electric Ind Co Ltd 半導体装置、そのための配線基板、封止金型、および製造方法

Also Published As

Publication number Publication date
JP2019075498A (ja) 2019-05-16
TW201917798A (zh) 2019-05-01
TWI654692B (zh) 2019-03-21
JP6981168B2 (ja) 2021-12-15
KR20190043444A (ko) 2019-04-26

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