KR101657309B1 - 메모리 회로 - Google Patents
메모리 회로 Download PDFInfo
- Publication number
- KR101657309B1 KR101657309B1 KR1020100012949A KR20100012949A KR101657309B1 KR 101657309 B1 KR101657309 B1 KR 101657309B1 KR 1020100012949 A KR1020100012949 A KR 1020100012949A KR 20100012949 A KR20100012949 A KR 20100012949A KR 101657309 B1 KR101657309 B1 KR 101657309B1
- Authority
- KR
- South Korea
- Prior art keywords
- memory cell
- column
- circuit
- memory
- writing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/143—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using laser-fusible links
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
- G11C17/165—Memory cells which are electrically programmed to cause a change in resistance, e.g. to permit multiple resistance steps to be programmed rather than conduct to or from non-conduct change of fuses and antifuses
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/18—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
Landscapes
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Read Only Memory (AREA)
- Static Random-Access Memory (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-2009-031380 | 2009-02-13 | ||
| JP2009031380A JP5208011B2 (ja) | 2009-02-13 | 2009-02-13 | メモリ回路装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20100092899A KR20100092899A (ko) | 2010-08-23 |
| KR101657309B1 true KR101657309B1 (ko) | 2016-09-13 |
Family
ID=42559793
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020100012949A Expired - Fee Related KR101657309B1 (ko) | 2009-02-13 | 2010-02-11 | 메모리 회로 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8259516B2 (enExample) |
| JP (1) | JP5208011B2 (enExample) |
| KR (1) | KR101657309B1 (enExample) |
| CN (1) | CN101807428B (enExample) |
| TW (1) | TWI498910B (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105244060B (zh) * | 2015-09-25 | 2019-01-01 | 北京兆易创新科技股份有限公司 | 一种基于芯片的测试处理方法及装置 |
| JP6390683B2 (ja) * | 2016-09-28 | 2018-09-19 | ミツミ電機株式会社 | 半導体集積回路 |
| JP6932552B2 (ja) | 2017-05-31 | 2021-09-08 | Hoya株式会社 | マスクブランク、転写用マスクの製造方法及び半導体デバイスの製造方法 |
| CN110956993A (zh) * | 2019-12-12 | 2020-04-03 | 中国科学院微电子研究所 | 基于电阻分压读取的阻变型存储单元 |
| CN116030871B (zh) * | 2023-03-23 | 2023-06-23 | 长鑫存储技术有限公司 | 一种修调电路和存储器 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060133155A1 (en) * | 2004-12-08 | 2006-06-22 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device and a method of erasing data thereof |
| US20070159891A1 (en) * | 2006-01-12 | 2007-07-12 | Loc Tu | Trimming of analog voltages in flash memory devices |
| US20080114949A1 (en) * | 2006-11-15 | 2008-05-15 | Fujitsu Limited | Method for controlling semiconductor memory device |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63263828A (ja) * | 1987-04-21 | 1988-10-31 | Mitsubishi Electric Corp | 半導体集積回路 |
| JPH0249297A (ja) * | 1988-08-10 | 1990-02-19 | Sharp Corp | 記憶装置 |
| JPH0637254A (ja) | 1992-07-20 | 1994-02-10 | Fujitsu Ltd | 半導体集積回路における基準電圧発生回路 |
| JP3308608B2 (ja) * | 1992-10-13 | 2002-07-29 | 株式会社日立製作所 | 信号処理装置および磁気記録再生装置 |
| JP3615009B2 (ja) * | 1997-02-12 | 2005-01-26 | 株式会社東芝 | 半導体記憶装置 |
| JPH11306782A (ja) * | 1998-04-24 | 1999-11-05 | Sharp Corp | 半導体記憶装置 |
| JP2003110029A (ja) * | 2001-06-27 | 2003-04-11 | Fuji Electric Co Ltd | 半導体装置、そのトリミング方法およびデータ記憶回路 |
| JP2005100538A (ja) * | 2003-09-25 | 2005-04-14 | Toshiba Corp | 不揮発性半導体記憶装置及びこれを用いた電子装置 |
| JP4698583B2 (ja) * | 2004-05-12 | 2011-06-08 | スパンション エルエルシー | 半導体装置及びその制御方法 |
| JP4825436B2 (ja) * | 2005-03-29 | 2011-11-30 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置及び半導体装置 |
| KR100684909B1 (ko) * | 2006-01-24 | 2007-02-22 | 삼성전자주식회사 | 읽기 에러를 방지할 수 있는 플래시 메모리 장치 |
| JP4852004B2 (ja) * | 2007-07-26 | 2012-01-11 | セイコーインスツル株式会社 | トリミング方法 |
| KR100933852B1 (ko) * | 2007-12-28 | 2009-12-24 | 주식회사 하이닉스반도체 | 불휘발성 메모리 소자 및 그 동작 방법 |
-
2009
- 2009-02-13 JP JP2009031380A patent/JP5208011B2/ja not_active Expired - Fee Related
-
2010
- 2010-01-28 TW TW099102455A patent/TWI498910B/zh not_active IP Right Cessation
- 2010-02-05 US US12/701,144 patent/US8259516B2/en not_active Expired - Fee Related
- 2010-02-11 CN CN201010115304.4A patent/CN101807428B/zh not_active Expired - Fee Related
- 2010-02-11 KR KR1020100012949A patent/KR101657309B1/ko not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060133155A1 (en) * | 2004-12-08 | 2006-06-22 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device and a method of erasing data thereof |
| US20070159891A1 (en) * | 2006-01-12 | 2007-07-12 | Loc Tu | Trimming of analog voltages in flash memory devices |
| US20080114949A1 (en) * | 2006-11-15 | 2008-05-15 | Fujitsu Limited | Method for controlling semiconductor memory device |
Also Published As
| Publication number | Publication date |
|---|---|
| US8259516B2 (en) | 2012-09-04 |
| US20100208532A1 (en) | 2010-08-19 |
| JP2010186525A (ja) | 2010-08-26 |
| JP5208011B2 (ja) | 2013-06-12 |
| KR20100092899A (ko) | 2010-08-23 |
| TWI498910B (zh) | 2015-09-01 |
| CN101807428B (zh) | 2014-04-23 |
| TW201115584A (en) | 2011-05-01 |
| CN101807428A (zh) | 2010-08-18 |
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| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
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| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
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St.27 status event code: A-3-3-R10-R13-asn-PN2301 St.27 status event code: A-3-3-R10-R11-asn-PN2301 |
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| A201 | Request for examination | ||
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