KR101114703B1 - 3개의 전기적으로 분리된 전극을 구비한 트랜지스터 및 그형성 방법 - Google Patents

3개의 전기적으로 분리된 전극을 구비한 트랜지스터 및 그형성 방법 Download PDF

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Publication number
KR101114703B1
KR101114703B1 KR1020067009072A KR20067009072A KR101114703B1 KR 101114703 B1 KR101114703 B1 KR 101114703B1 KR 1020067009072 A KR1020067009072 A KR 1020067009072A KR 20067009072 A KR20067009072 A KR 20067009072A KR 101114703 B1 KR101114703 B1 KR 101114703B1
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gate
gate structure
layer
transistor
sidewall
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Expired - Fee Related
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Korean (ko)
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KR20060123141A (ko
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레오 매더우
라마찬드란 무랄리드하
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프리스케일 세미컨덕터, 인크.
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/6891Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H10D30/6893Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode wherein the floating gate has multiple non-connected parts, e.g. multi-particle floating gate
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05Making the transistor
    • H10B12/056Making the transistor the transistor being a FinFET
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/36DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being a FinFET
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/031Manufacture or treatment of data-storage electrodes
    • H10D64/035Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/031Manufacture or treatment of data-storage electrodes
    • H10D64/037Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/09Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/62Fin field-effect transistors [FinFET]

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Thin Film Transistor (AREA)
KR1020067009072A 2003-11-10 2004-10-20 3개의 전기적으로 분리된 전극을 구비한 트랜지스터 및 그형성 방법 Expired - Fee Related KR101114703B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/705,317 US7098502B2 (en) 2003-11-10 2003-11-10 Transistor having three electrically isolated electrodes and method of formation
US10/705,317 2003-11-10
PCT/US2004/034810 WO2005048299A2 (en) 2003-11-10 2004-10-20 Transistor having three electronically isolated electrodes and method of formation

Publications (2)

Publication Number Publication Date
KR20060123141A KR20060123141A (ko) 2006-12-01
KR101114703B1 true KR101114703B1 (ko) 2012-02-29

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KR1020067009072A Expired - Fee Related KR101114703B1 (ko) 2003-11-10 2004-10-20 3개의 전기적으로 분리된 전극을 구비한 트랜지스터 및 그형성 방법

Country Status (7)

Country Link
US (1) US7098502B2 (enExample)
EP (1) EP1702367A2 (enExample)
JP (1) JP2007511090A (enExample)
KR (1) KR101114703B1 (enExample)
CN (1) CN100433363C (enExample)
TW (1) TWI360863B (enExample)
WO (1) WO2005048299A2 (enExample)

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TWI360863B (en) 2012-03-21
US7098502B2 (en) 2006-08-29
CN1868067A (zh) 2006-11-22
WO2005048299A2 (en) 2005-05-26
JP2007511090A (ja) 2007-04-26
US20050098822A1 (en) 2005-05-12
WO2005048299A3 (en) 2005-11-17
CN100433363C (zh) 2008-11-12
TW200527599A (en) 2005-08-16
KR20060123141A (ko) 2006-12-01

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