KR100956241B1 - 공핍가능한 콜렉터 컬럼을 가진 바이폴라 방법 및 구조 - Google Patents
공핍가능한 콜렉터 컬럼을 가진 바이폴라 방법 및 구조 Download PDFInfo
- Publication number
- KR100956241B1 KR100956241B1 KR1020087004866A KR20087004866A KR100956241B1 KR 100956241 B1 KR100956241 B1 KR 100956241B1 KR 1020087004866 A KR1020087004866 A KR 1020087004866A KR 20087004866 A KR20087004866 A KR 20087004866A KR 100956241 B1 KR100956241 B1 KR 100956241B1
- Authority
- KR
- South Korea
- Prior art keywords
- doped
- emitter
- bipolar transistor
- region
- collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/137—Collector regions of BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/40—Vertical BJTs
- H10D10/421—Vertical BJTs having both emitter-base and base-collector junctions ending at the same surface of the body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/01—Manufacture or treatment
- H10D62/051—Forming charge compensation regions, e.g. superjunctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/109—Reduced surface field [RESURF] PN junction structures
- H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
Landscapes
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/217,304 US7285469B2 (en) | 2005-09-02 | 2005-09-02 | Bipolar method and structure having improved BVCEO/RCS trade-off made with depletable collector columns |
| US11/217,304 | 2005-09-02 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20080037690A KR20080037690A (ko) | 2008-04-30 |
| KR100956241B1 true KR100956241B1 (ko) | 2010-05-06 |
Family
ID=37690563
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020087004866A Expired - Fee Related KR100956241B1 (ko) | 2005-09-02 | 2006-09-01 | 공핍가능한 콜렉터 컬럼을 가진 바이폴라 방법 및 구조 |
Country Status (7)
| Country | Link |
|---|---|
| US (4) | US7285469B2 (enExample) |
| EP (1) | EP1922758B1 (enExample) |
| JP (1) | JP2009507378A (enExample) |
| KR (1) | KR100956241B1 (enExample) |
| CN (1) | CN101258601B (enExample) |
| TW (1) | TWI356492B (enExample) |
| WO (1) | WO2007028016A2 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7482672B2 (en) * | 2006-06-30 | 2009-01-27 | International Business Machines Corporation | Semiconductor device structures for bipolar junction transistors |
| KR100812079B1 (ko) * | 2006-08-22 | 2008-03-07 | 동부일렉트로닉스 주식회사 | 수직형 바이폴라 접합 트랜지스터 및 그 제조 방법, 이를갖는 씨모스 이미지 센서 및 그 제조 방법 |
| JP5217257B2 (ja) * | 2007-06-06 | 2013-06-19 | 株式会社デンソー | 半導体装置およびその製造方法 |
| US7847373B2 (en) * | 2008-12-22 | 2010-12-07 | Agostino Pirovano | Fabricating bipolar junction select transistors for semiconductor memories |
| US8546850B2 (en) * | 2009-04-09 | 2013-10-01 | Georgia Gech Research Corporation | Superjunction collectors for transistors and semiconductor devices |
| US12426286B2 (en) * | 2016-06-25 | 2025-09-23 | Texas Instruments Incorporated | Radiation enhanced bipolar transistor |
| CN110010693B (zh) * | 2019-05-07 | 2024-03-12 | 无锡紫光微电子有限公司 | 一种高压深沟槽型超结mosfet的结构及其制作方法 |
| DE112020005498T5 (de) * | 2019-11-08 | 2022-09-15 | Nisshinbo Micro Devices Inc. | Halbleiterbauelement |
| CN118825062B (zh) * | 2024-09-13 | 2024-12-27 | 芯联先锋集成电路制造(绍兴)有限公司 | 半导体器件、双极型晶体管及其制备方法 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001084631A1 (en) * | 2000-04-27 | 2001-11-08 | En Jun Zhu | Improved structure for a semiconductor device |
| US20030008483A1 (en) * | 1999-10-21 | 2003-01-09 | Fuji Electric, Co., Ltd. | Super-junction semiconductor device and the method of manufacturing the same |
| US20040212032A1 (en) | 2000-04-27 | 2004-10-28 | Fuji Electric Co., Ltd. | Lateral super-junction semiconductor device |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3131611A1 (de) * | 1981-08-10 | 1983-02-24 | Siemens AG, 1000 Berlin und 8000 München | Epitaxialer transistor |
| US4532003A (en) * | 1982-08-09 | 1985-07-30 | Harris Corporation | Method of fabrication bipolar transistor with improved base collector breakdown voltage and collector series resistance |
| US4729008A (en) * | 1982-12-08 | 1988-03-01 | Harris Corporation | High voltage IC bipolar transistors operable to BVCBO and method of fabrication |
| US5344785A (en) * | 1992-03-13 | 1994-09-06 | United Technologies Corporation | Method of forming high speed, high voltage fully isolated bipolar transistors on a SOI substrate |
| US5428233A (en) * | 1994-04-04 | 1995-06-27 | Motorola Inc. | Voltage controlled resistive device |
| US5633180A (en) * | 1995-06-01 | 1997-05-27 | Harris Corporation | Method of forming P-type islands over P-type buried layer |
| US6423990B1 (en) * | 1997-09-29 | 2002-07-23 | National Scientific Corporation | Vertical heterojunction bipolar transistor |
| JP4447065B2 (ja) * | 1999-01-11 | 2010-04-07 | 富士電機システムズ株式会社 | 超接合半導体素子の製造方法 |
| DE10106073C2 (de) * | 2001-02-09 | 2003-01-30 | Infineon Technologies Ag | SOI-Bauelement |
| US6822292B2 (en) * | 2001-11-21 | 2004-11-23 | Intersil Americas Inc. | Lateral MOSFET structure of an integrated circuit having separated device regions |
| JP4166627B2 (ja) * | 2003-05-30 | 2008-10-15 | 株式会社デンソー | 半導体装置 |
| US7170119B2 (en) * | 2003-08-20 | 2007-01-30 | Denso Corporation | Vertical type semiconductor device |
| US6740563B1 (en) * | 2003-10-02 | 2004-05-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Amorphizing ion implant method for forming polysilicon emitter bipolar transistor |
| JP4904673B2 (ja) * | 2004-02-09 | 2012-03-28 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
-
2005
- 2005-09-02 US US11/217,304 patent/US7285469B2/en not_active Expired - Lifetime
-
2006
- 2006-08-17 TW TW095130207A patent/TWI356492B/zh active
- 2006-09-01 CN CN2006800322314A patent/CN101258601B/zh not_active Expired - Fee Related
- 2006-09-01 JP JP2008529307A patent/JP2009507378A/ja active Pending
- 2006-09-01 EP EP06802800.0A patent/EP1922758B1/en active Active
- 2006-09-01 WO PCT/US2006/034224 patent/WO2007028016A2/en not_active Ceased
- 2006-09-01 KR KR1020087004866A patent/KR100956241B1/ko not_active Expired - Fee Related
-
2007
- 2007-08-08 US US11/835,885 patent/US7473983B2/en not_active Ceased
-
2011
- 2011-01-06 US US12/985,856 patent/USRE43042E1/en not_active Expired - Lifetime
- 2011-11-14 US US13/295,764 patent/USRE44140E1/en not_active Expired - Lifetime
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030008483A1 (en) * | 1999-10-21 | 2003-01-09 | Fuji Electric, Co., Ltd. | Super-junction semiconductor device and the method of manufacturing the same |
| WO2001084631A1 (en) * | 2000-04-27 | 2001-11-08 | En Jun Zhu | Improved structure for a semiconductor device |
| US20020000640A1 (en) | 2000-04-27 | 2002-01-03 | Zhu En Jun | Structure for a semiconductor device |
| US20040212032A1 (en) | 2000-04-27 | 2004-10-28 | Fuji Electric Co., Ltd. | Lateral super-junction semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| USRE43042E1 (en) | 2011-12-27 |
| US20070052066A1 (en) | 2007-03-08 |
| USRE44140E1 (en) | 2013-04-09 |
| TW200721482A (en) | 2007-06-01 |
| JP2009507378A (ja) | 2009-02-19 |
| CN101258601B (zh) | 2010-12-15 |
| US20070273006A1 (en) | 2007-11-29 |
| CN101258601A (zh) | 2008-09-03 |
| WO2007028016A3 (en) | 2007-05-24 |
| WO2007028016A2 (en) | 2007-03-08 |
| EP1922758A2 (en) | 2008-05-21 |
| US7473983B2 (en) | 2009-01-06 |
| EP1922758B1 (en) | 2019-12-04 |
| US7285469B2 (en) | 2007-10-23 |
| KR20080037690A (ko) | 2008-04-30 |
| TWI356492B (en) | 2012-01-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| USRE44140E1 (en) | Bipolar method and structure having improved BVCEO/RCS trade-off made with depletable collector columns | |
| KR100223098B1 (ko) | Bicmos 디바이스 및 그 제조방법 | |
| US5171699A (en) | Vertical DMOS transistor structure built in an N-well CMOS-based BiCMOS process and method of fabrication | |
| JP2968222B2 (ja) | 半導体装置及びシリコンウエハの調製方法 | |
| JP4145364B2 (ja) | Dmos構造及びその製造方法 | |
| KR20030005385A (ko) | 전계 효과 트랜지스터의 구조 및 제조 방법 | |
| KR20090051213A (ko) | Soi 또는 벌크형 실리콘 중의 하나에 백게이트가 구성된접합 전계 효과 트랜지스터 | |
| US20030080394A1 (en) | Control of dopant diffusion from polysilicon emitters in bipolar integrated circuits | |
| KR101232662B1 (ko) | 반도체 디바이스를 형성하는 방법 및 그의 구조 | |
| US10910493B2 (en) | Semiconductor device and method of manufacturing the same | |
| KR100368847B1 (ko) | 절연게이트반도체장치및그제조방법 | |
| EP0645821B1 (en) | Low noise bipolar transistor | |
| KR0182030B1 (ko) | 바이시모스 트랜지스터 및 그 제조 방법 | |
| US7180152B2 (en) | Process for resurf diffusion for high voltage MOSFET | |
| KR0174546B1 (ko) | 반도체 디바이스 및 그 형성 방법 | |
| KR100281397B1 (ko) | 초박형 soi 정전기방전 보호 소자의 형성 방법 | |
| EP0718891B1 (en) | High performance, high voltage non-epi bipolar transistor | |
| US20120001260A1 (en) | Semiconductor devices and methods of manufacturing the same | |
| JPH0691192B2 (ja) | 接合電界効果トランジスタとキャパシタを形成する方法 | |
| CN119300415B (zh) | 一种集成高性能的ldmos器件及其制备方法 | |
| KR100193119B1 (ko) | 전력용 트랜지스터 및 그 제조방법 | |
| JPH06283671A (ja) | 負の動作抵抗の可能な電子部品およびその製造方法 | |
| JP2004511912A (ja) | 無線周波数用パワートランジスタの耐性を改善するための保護ダイオードおよびその保護ダイオードを製造するための自己決定方法 | |
| JP3275964B2 (ja) | 電界効果トランジスタを含む半導体装置 | |
| JPS6318659A (ja) | 半導体装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| PA0105 | International application |
St.27 status event code: A-0-1-A10-A15-nap-PA0105 |
|
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| E13-X000 | Pre-grant limitation requested |
St.27 status event code: A-2-3-E10-E13-lim-X000 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
St.27 status event code: A-1-2-D10-D22-exm-PE0701 |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
St.27 status event code: A-2-4-F10-F11-exm-PR0701 |
|
| PR1002 | Payment of registration fee |
St.27 status event code: A-2-2-U10-U12-oth-PR1002 Fee payment year number: 1 |
|
| PG1601 | Publication of registration |
St.27 status event code: A-4-4-Q10-Q13-nap-PG1601 |
|
| PN2301 | Change of applicant |
St.27 status event code: A-5-5-R10-R13-asn-PN2301 St.27 status event code: A-5-5-R10-R11-asn-PN2301 |
|
| FPAY | Annual fee payment |
Payment date: 20130410 Year of fee payment: 4 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 4 |
|
| FPAY | Annual fee payment |
Payment date: 20140409 Year of fee payment: 5 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 5 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 6 |
|
| FPAY | Annual fee payment |
Payment date: 20160411 Year of fee payment: 7 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 7 |
|
| FPAY | Annual fee payment |
Payment date: 20170413 Year of fee payment: 8 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 8 |
|
| FPAY | Annual fee payment |
Payment date: 20180413 Year of fee payment: 9 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 9 |
|
| FPAY | Annual fee payment |
Payment date: 20190411 Year of fee payment: 10 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 10 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 11 |
|
| PC1903 | Unpaid annual fee |
St.27 status event code: A-4-4-U10-U13-oth-PC1903 Not in force date: 20210428 Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE |
|
| PC1903 | Unpaid annual fee |
St.27 status event code: N-4-6-H10-H13-oth-PC1903 Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE Not in force date: 20210428 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-4-4-P10-P22-nap-X000 |