CN101258601B - 具有可耗尽的集电极列的双极方法和结构 - Google Patents

具有可耗尽的集电极列的双极方法和结构 Download PDF

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Publication number
CN101258601B
CN101258601B CN2006800322314A CN200680032231A CN101258601B CN 101258601 B CN101258601 B CN 101258601B CN 2006800322314 A CN2006800322314 A CN 2006800322314A CN 200680032231 A CN200680032231 A CN 200680032231A CN 101258601 B CN101258601 B CN 101258601B
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CN
China
Prior art keywords
bipolar transistor
emitter
integrated circuit
conductivity type
device layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2006800322314A
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English (en)
Chinese (zh)
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CN101258601A (zh
Inventor
J·D·比森
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Intersil Corp
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Intersil Inc
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Publication date
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Publication of CN101258601A publication Critical patent/CN101258601A/zh
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Publication of CN101258601B publication Critical patent/CN101258601B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/137—Collector regions of BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/40—Vertical BJTs
    • H10D10/421—Vertical BJTs having both emitter-base and base-collector junctions ending at the same surface of the body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/051—Forming charge compensation regions, e.g. superjunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109—Reduced surface field [RESURF] PN junction structures
    • H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions

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  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
CN2006800322314A 2005-09-02 2006-09-01 具有可耗尽的集电极列的双极方法和结构 Expired - Fee Related CN101258601B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/217,304 US7285469B2 (en) 2005-09-02 2005-09-02 Bipolar method and structure having improved BVCEO/RCS trade-off made with depletable collector columns
US11/217,304 2005-09-02
PCT/US2006/034224 WO2007028016A2 (en) 2005-09-02 2006-09-01 Bipolar method and structure with depletable collector colums

Publications (2)

Publication Number Publication Date
CN101258601A CN101258601A (zh) 2008-09-03
CN101258601B true CN101258601B (zh) 2010-12-15

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2006800322314A Expired - Fee Related CN101258601B (zh) 2005-09-02 2006-09-01 具有可耗尽的集电极列的双极方法和结构

Country Status (7)

Country Link
US (4) US7285469B2 (enExample)
EP (1) EP1922758B1 (enExample)
JP (1) JP2009507378A (enExample)
KR (1) KR100956241B1 (enExample)
CN (1) CN101258601B (enExample)
TW (1) TWI356492B (enExample)
WO (1) WO2007028016A2 (enExample)

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US7482672B2 (en) * 2006-06-30 2009-01-27 International Business Machines Corporation Semiconductor device structures for bipolar junction transistors
KR100812079B1 (ko) * 2006-08-22 2008-03-07 동부일렉트로닉스 주식회사 수직형 바이폴라 접합 트랜지스터 및 그 제조 방법, 이를갖는 씨모스 이미지 센서 및 그 제조 방법
JP5217257B2 (ja) * 2007-06-06 2013-06-19 株式会社デンソー 半導体装置およびその製造方法
US7847373B2 (en) * 2008-12-22 2010-12-07 Agostino Pirovano Fabricating bipolar junction select transistors for semiconductor memories
US8546850B2 (en) * 2009-04-09 2013-10-01 Georgia Gech Research Corporation Superjunction collectors for transistors and semiconductor devices
US12426286B2 (en) * 2016-06-25 2025-09-23 Texas Instruments Incorporated Radiation enhanced bipolar transistor
CN110010693B (zh) * 2019-05-07 2024-03-12 无锡紫光微电子有限公司 一种高压深沟槽型超结mosfet的结构及其制作方法
DE112020005498T5 (de) * 2019-11-08 2022-09-15 Nisshinbo Micro Devices Inc. Halbleiterbauelement
CN118825062B (zh) * 2024-09-13 2024-12-27 芯联先锋集成电路制造(绍兴)有限公司 半导体器件、双极型晶体管及其制备方法

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DE3131611A1 (de) * 1981-08-10 1983-02-24 Siemens AG, 1000 Berlin und 8000 München Epitaxialer transistor
US4532003A (en) * 1982-08-09 1985-07-30 Harris Corporation Method of fabrication bipolar transistor with improved base collector breakdown voltage and collector series resistance
US4729008A (en) * 1982-12-08 1988-03-01 Harris Corporation High voltage IC bipolar transistors operable to BVCBO and method of fabrication
US5344785A (en) * 1992-03-13 1994-09-06 United Technologies Corporation Method of forming high speed, high voltage fully isolated bipolar transistors on a SOI substrate
US5428233A (en) * 1994-04-04 1995-06-27 Motorola Inc. Voltage controlled resistive device
US5633180A (en) * 1995-06-01 1997-05-27 Harris Corporation Method of forming P-type islands over P-type buried layer
US6423990B1 (en) * 1997-09-29 2002-07-23 National Scientific Corporation Vertical heterojunction bipolar transistor
JP4447065B2 (ja) * 1999-01-11 2010-04-07 富士電機システムズ株式会社 超接合半導体素子の製造方法
US6475864B1 (en) * 1999-10-21 2002-11-05 Fuji Electric Co., Ltd. Method of manufacturing a super-junction semiconductor device with an conductivity type layer
WO2001084631A1 (en) 2000-04-27 2001-11-08 En Jun Zhu Improved structure for a semiconductor device
JP4534303B2 (ja) * 2000-04-27 2010-09-01 富士電機システムズ株式会社 横型超接合半導体素子
DE10106073C2 (de) * 2001-02-09 2003-01-30 Infineon Technologies Ag SOI-Bauelement
US6822292B2 (en) * 2001-11-21 2004-11-23 Intersil Americas Inc. Lateral MOSFET structure of an integrated circuit having separated device regions
JP4166627B2 (ja) * 2003-05-30 2008-10-15 株式会社デンソー 半導体装置
US7170119B2 (en) * 2003-08-20 2007-01-30 Denso Corporation Vertical type semiconductor device
US6740563B1 (en) * 2003-10-02 2004-05-25 Taiwan Semiconductor Manufacturing Co., Ltd. Amorphizing ion implant method for forming polysilicon emitter bipolar transistor
JP4904673B2 (ja) * 2004-02-09 2012-03-28 富士電機株式会社 半導体装置および半導体装置の製造方法

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
US 2002/0000640 A1,说明书0010－0020段及附图2－3.
US 2003/0008483 A1,全文.

Also Published As

Publication number Publication date
USRE43042E1 (en) 2011-12-27
US20070052066A1 (en) 2007-03-08
USRE44140E1 (en) 2013-04-09
TW200721482A (en) 2007-06-01
JP2009507378A (ja) 2009-02-19
US20070273006A1 (en) 2007-11-29
CN101258601A (zh) 2008-09-03
WO2007028016A3 (en) 2007-05-24
WO2007028016A2 (en) 2007-03-08
KR100956241B1 (ko) 2010-05-06
EP1922758A2 (en) 2008-05-21
US7473983B2 (en) 2009-01-06
EP1922758B1 (en) 2019-12-04
US7285469B2 (en) 2007-10-23
KR20080037690A (ko) 2008-04-30
TWI356492B (en) 2012-01-11

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Granted publication date: 20101215