TWI356492B - Structures having improved bvceo/rcs trade-off mad - Google Patents

Structures having improved bvceo/rcs trade-off mad Download PDF

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Publication number
TWI356492B
TWI356492B TW095130207A TW95130207A TWI356492B TW I356492 B TWI356492 B TW I356492B TW 095130207 A TW095130207 A TW 095130207A TW 95130207 A TW95130207 A TW 95130207A TW I356492 B TWI356492 B TW I356492B
Authority
TW
Taiwan
Prior art keywords
bipolar transistor
region
doped
emitter
integrated circuit
Prior art date
Application number
TW095130207A
Other languages
English (en)
Chinese (zh)
Other versions
TW200721482A (en
Inventor
James Douglas Beasom
Original Assignee
Intersil Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intersil Inc filed Critical Intersil Inc
Publication of TW200721482A publication Critical patent/TW200721482A/zh
Application granted granted Critical
Publication of TWI356492B publication Critical patent/TWI356492B/zh

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/137Collector regions of BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/40Vertical BJTs
    • H10D10/421Vertical BJTs having both emitter-base and base-collector junctions ending at the same surface of the body
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01Manufacture or treatment
    • H10D62/051Forming charge compensation regions, e.g. superjunctions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109Reduced surface field [RESURF] PN junction structures
    • H10D62/111Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions

Landscapes

  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
TW095130207A 2005-09-02 2006-08-17 Structures having improved bvceo/rcs trade-off mad TWI356492B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/217,304 US7285469B2 (en) 2005-09-02 2005-09-02 Bipolar method and structure having improved BVCEO/RCS trade-off made with depletable collector columns

Publications (2)

Publication Number Publication Date
TW200721482A TW200721482A (en) 2007-06-01
TWI356492B true TWI356492B (en) 2012-01-11

Family

ID=37690563

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095130207A TWI356492B (en) 2005-09-02 2006-08-17 Structures having improved bvceo/rcs trade-off mad

Country Status (7)

Country Link
US (4) US7285469B2 (enExample)
EP (1) EP1922758B1 (enExample)
JP (1) JP2009507378A (enExample)
KR (1) KR100956241B1 (enExample)
CN (1) CN101258601B (enExample)
TW (1) TWI356492B (enExample)
WO (1) WO2007028016A2 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7482672B2 (en) * 2006-06-30 2009-01-27 International Business Machines Corporation Semiconductor device structures for bipolar junction transistors
KR100812079B1 (ko) * 2006-08-22 2008-03-07 동부일렉트로닉스 주식회사 수직형 바이폴라 접합 트랜지스터 및 그 제조 방법, 이를갖는 씨모스 이미지 센서 및 그 제조 방법
JP5217257B2 (ja) * 2007-06-06 2013-06-19 株式会社デンソー 半導体装置およびその製造方法
US7847373B2 (en) * 2008-12-22 2010-12-07 Agostino Pirovano Fabricating bipolar junction select transistors for semiconductor memories
WO2010118215A1 (en) * 2009-04-09 2010-10-14 Georgia Tech Research Corporation Superjunction collectors for transistors & semiconductor devices
US12426286B2 (en) 2016-06-25 2025-09-23 Texas Instruments Incorporated Radiation enhanced bipolar transistor
CN110010693B (zh) * 2019-05-07 2024-03-12 无锡紫光微电子有限公司 一种高压深沟槽型超结mosfet的结构及其制作方法
DE112020005498T5 (de) * 2019-11-08 2022-09-15 Nisshinbo Micro Devices Inc. Halbleiterbauelement
CN118825062B (zh) * 2024-09-13 2024-12-27 芯联先锋集成电路制造(绍兴)有限公司 半导体器件、双极型晶体管及其制备方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3131611A1 (de) * 1981-08-10 1983-02-24 Siemens AG, 1000 Berlin und 8000 München Epitaxialer transistor
US4532003A (en) 1982-08-09 1985-07-30 Harris Corporation Method of fabrication bipolar transistor with improved base collector breakdown voltage and collector series resistance
US4729008A (en) 1982-12-08 1988-03-01 Harris Corporation High voltage IC bipolar transistors operable to BVCBO and method of fabrication
US5344785A (en) * 1992-03-13 1994-09-06 United Technologies Corporation Method of forming high speed, high voltage fully isolated bipolar transistors on a SOI substrate
US5428233A (en) * 1994-04-04 1995-06-27 Motorola Inc. Voltage controlled resistive device
US5633180A (en) 1995-06-01 1997-05-27 Harris Corporation Method of forming P-type islands over P-type buried layer
US6423990B1 (en) * 1997-09-29 2002-07-23 National Scientific Corporation Vertical heterojunction bipolar transistor
JP4447065B2 (ja) * 1999-01-11 2010-04-07 富士電機システムズ株式会社 超接合半導体素子の製造方法
US6475864B1 (en) 1999-10-21 2002-11-05 Fuji Electric Co., Ltd. Method of manufacturing a super-junction semiconductor device with an conductivity type layer
US6559517B2 (en) 2000-04-27 2003-05-06 En Jun Zhu Structure for a semiconductor device
JP4534303B2 (ja) 2000-04-27 2010-09-01 富士電機システムズ株式会社 横型超接合半導体素子
DE10106073C2 (de) 2001-02-09 2003-01-30 Infineon Technologies Ag SOI-Bauelement
US6822292B2 (en) * 2001-11-21 2004-11-23 Intersil Americas Inc. Lateral MOSFET structure of an integrated circuit having separated device regions
JP4166627B2 (ja) * 2003-05-30 2008-10-15 株式会社デンソー 半導体装置
CN1823421B (zh) * 2003-08-20 2010-04-28 株式会社电装 垂直型半导体装置
US6740563B1 (en) * 2003-10-02 2004-05-25 Taiwan Semiconductor Manufacturing Co., Ltd. Amorphizing ion implant method for forming polysilicon emitter bipolar transistor
JP4904673B2 (ja) * 2004-02-09 2012-03-28 富士電機株式会社 半導体装置および半導体装置の製造方法

Also Published As

Publication number Publication date
CN101258601A (zh) 2008-09-03
USRE43042E1 (en) 2011-12-27
KR20080037690A (ko) 2008-04-30
CN101258601B (zh) 2010-12-15
WO2007028016A3 (en) 2007-05-24
JP2009507378A (ja) 2009-02-19
US7473983B2 (en) 2009-01-06
EP1922758B1 (en) 2019-12-04
US20070273006A1 (en) 2007-11-29
WO2007028016A2 (en) 2007-03-08
US7285469B2 (en) 2007-10-23
USRE44140E1 (en) 2013-04-09
TW200721482A (en) 2007-06-01
KR100956241B1 (ko) 2010-05-06
EP1922758A2 (en) 2008-05-21
US20070052066A1 (en) 2007-03-08

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