KR100930140B1 - 깊은 트렌치를 도핑된 실리콘으로 충진하는 처리 시퀀스 - Google Patents

깊은 트렌치를 도핑된 실리콘으로 충진하는 처리 시퀀스 Download PDF

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Publication number
KR100930140B1
KR100930140B1 KR1020077015164A KR20077015164A KR100930140B1 KR 100930140 B1 KR100930140 B1 KR 100930140B1 KR 1020077015164 A KR1020077015164 A KR 1020077015164A KR 20077015164 A KR20077015164 A KR 20077015164A KR 100930140 B1 KR100930140 B1 KR 100930140B1
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South Korea
Prior art keywords
trench
amorphous silicon
doped amorphous
arsenic
wafer
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Expired - Fee Related
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Korean (ko)
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KR20070086885A (ko
Inventor
아지트 파란지페
솜나쓰 나그
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어플라이드 머티어리얼스, 인코포레이티드
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/01—Manufacture or treatment
    • H10D1/045—Manufacture or treatment of capacitors having potential barriers, e.g. varactors
    • H10D1/047—Manufacture or treatment of capacitors having potential barriers, e.g. varactors of conductor-insulator-semiconductor capacitors, e.g. trench capacitors
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/04—Coating on selected surface areas, e.g. using masks
    • C23C16/045—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24—Deposition of silicon only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Power Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
KR1020077015164A 2004-12-14 2005-12-13 깊은 트렌치를 도핑된 실리콘으로 충진하는 처리 시퀀스 Expired - Fee Related KR100930140B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/011,550 2004-12-14
US11/011,550 US7109097B2 (en) 2004-12-14 2004-12-14 Process sequence for doped silicon fill of deep trenches
PCT/US2005/044985 WO2006065776A2 (en) 2004-12-14 2005-12-13 Process sequence for doped silicon fill of deep trenches

Publications (2)

Publication Number Publication Date
KR20070086885A KR20070086885A (ko) 2007-08-27
KR100930140B1 true KR100930140B1 (ko) 2009-12-07

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KR1020077015164A Expired - Fee Related KR100930140B1 (ko) 2004-12-14 2005-12-13 깊은 트렌치를 도핑된 실리콘으로 충진하는 처리 시퀀스

Country Status (6)

Country Link
US (3) US7109097B2 (enExample)
EP (1) EP1829095A2 (enExample)
JP (1) JP5252417B2 (enExample)
KR (1) KR100930140B1 (enExample)
CN (1) CN100561694C (enExample)
WO (1) WO2006065776A2 (enExample)

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KR20160131793A (ko) * 2015-05-08 2016-11-16 주식회사 유진테크 비정질 박막의 형성방법

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US7344975B2 (en) * 2005-08-26 2008-03-18 Micron Technology, Inc. Method to reduce charge buildup during high aspect ratio contact etch
US7608195B2 (en) * 2006-02-21 2009-10-27 Micron Technology, Inc. High aspect ratio contacts
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US7943463B2 (en) * 2009-04-02 2011-05-17 Micron Technology, Inc. Methods of semiconductor processing involving forming doped polysilicon on undoped polysilicon
CN101859700B (zh) * 2009-04-09 2012-05-30 上海先进半导体制造股份有限公司 多晶硅淀积工艺
JP2010272758A (ja) * 2009-05-22 2010-12-02 Hitachi High-Technologies Corp 被エッチング材のプラズマエッチング方法
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JP6059085B2 (ja) * 2013-05-27 2017-01-11 東京エレクトロン株式会社 トレンチを充填する方法及び処理装置
JP6150724B2 (ja) * 2013-12-27 2017-06-21 東京エレクトロン株式会社 凹部を充填する方法
US9704708B2 (en) 2014-07-11 2017-07-11 Applied Materials, Inc. Halogenated dopant precursors for epitaxy
US20160020094A1 (en) * 2014-07-18 2016-01-21 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
KR102318197B1 (ko) 2014-09-22 2021-10-26 삼성전자주식회사 씨모스 이미지 센서의 픽셀 및 이를 포함하는 이미지 센서
US9401410B2 (en) * 2014-11-26 2016-07-26 Texas Instruments Incorporated Poly sandwich for deep trench fill
CN105826312B (zh) * 2015-01-04 2019-01-11 旺宏电子股份有限公司 半导体元件及其制造方法
US10468263B2 (en) 2015-12-19 2019-11-05 Applied Materials, Inc. Tungsten deposition without barrier layer
US10991586B2 (en) 2015-12-19 2021-04-27 Applied Materials, Inc. In-situ tungsten deposition without barrier layer
US10480066B2 (en) 2015-12-19 2019-11-19 Applied Materials, Inc. Metal deposition methods
US9768072B1 (en) 2016-06-30 2017-09-19 International Business Machines Corporation Fabrication of a vertical fin field effect transistor with reduced dimensional variations
KR102499035B1 (ko) 2016-07-25 2023-02-13 삼성전자주식회사 반도체 장치의 제조 방법
US20180076026A1 (en) 2016-09-14 2018-03-15 Applied Materials, Inc. Steam oxidation initiation for high aspect ratio conformal radical oxidation
CN110431661B (zh) * 2017-03-31 2023-09-22 应用材料公司 用于用非晶硅膜对高深宽比沟槽进行间隙填充的两步工艺
WO2019013891A1 (en) * 2017-07-12 2019-01-17 Applied Materials, Inc. CYCLIC CONFORMAL DEPOSITION / REINFORCEMENT / ETCHING FOR FILLING INS
WO2019074877A1 (en) * 2017-10-09 2019-04-18 Applied Materials, Inc. DOPED AMORPHOUS SILICON CONFORMS AS A METAL DEPOSITION NUCLEATION LAYER
CN109904057A (zh) * 2017-12-11 2019-06-18 中芯国际集成电路制造(北京)有限公司 半导体装置的制造方法
JP6968011B2 (ja) 2018-03-19 2021-11-17 東京エレクトロン株式会社 成膜方法及び成膜装置
CN109300781B (zh) * 2018-09-11 2020-08-11 上海华虹宏力半导体制造有限公司 Ono膜层的制造方法
TWI768860B (zh) * 2021-04-29 2022-06-21 力晶積成電子製造股份有限公司 沉積製程控制方法
CN113628959B (zh) * 2021-07-19 2024-06-14 华虹半导体(无锡)有限公司 应用于功率器件的沟槽填充方法
CN116110777A (zh) * 2021-11-10 2023-05-12 长江存储科技有限责任公司 掺杂有杂质的硅薄膜、其制备方法以及半导体器件
CN114267642A (zh) * 2021-12-01 2022-04-01 福建省晋华集成电路有限公司 半导体存储装置及其制备方法
CN117238839B (zh) * 2023-11-10 2024-02-09 合肥晶合集成电路股份有限公司 一种浅沟槽隔离结构及其形成方法

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Publication number Priority date Publication date Assignee Title
KR20160131793A (ko) * 2015-05-08 2016-11-16 주식회사 유진테크 비정질 박막의 형성방법
WO2016182296A1 (ko) * 2015-05-08 2016-11-17 주식회사 유진테크 비정질 박막의 형성방법
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Also Published As

Publication number Publication date
EP1829095A2 (en) 2007-09-05
US7446366B2 (en) 2008-11-04
JP5252417B2 (ja) 2013-07-31
WO2006065776A3 (en) 2006-11-30
KR20070086885A (ko) 2007-08-27
US7713881B2 (en) 2010-05-11
CN101084574A (zh) 2007-12-05
US20060128139A1 (en) 2006-06-15
JP2008523640A (ja) 2008-07-03
WO2006065776A2 (en) 2006-06-22
CN100561694C (zh) 2009-11-18
US20080318441A1 (en) 2008-12-25
US20060234470A1 (en) 2006-10-19
US7109097B2 (en) 2006-09-19

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