KR100848226B1 - 반도체 장치의 제조 방법 및 기판 처리 장치 - Google Patents
반도체 장치의 제조 방법 및 기판 처리 장치 Download PDFInfo
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- KR100848226B1 KR100848226B1 KR1020067007137A KR20067007137A KR100848226B1 KR 100848226 B1 KR100848226 B1 KR 100848226B1 KR 1020067007137 A KR1020067007137 A KR 1020067007137A KR 20067007137 A KR20067007137 A KR 20067007137A KR 100848226 B1 KR100848226 B1 KR 100848226B1
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Abstract
Description
Claims (21)
- 기판 상에 금속 원자와 실리콘 원자를 포함한 막을 성막하는 성막 공정; 및상기 막에 질화 처리를 실시하는 질화 처리 공정을 포함하며,상기 성막 공정에서는 적어도 2 단계로 실리콘 농도를 변화시켜 성막하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항에 있어서,상기 성막 공정에서는 심도 방향으로 실리콘 농도가 다른 막을 성막하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항에 있어서,상기 성막 공정에서는 실리콘 농도가 서로 다른 2층 이상의 층으로 구성되는 막을 성막하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항에 있어서,상기 성막 공정에서는, 상기 막의 표면측의 부분이 상기 기판측보다 실리콘 농도가 커지도록 성막하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항에 있어서,상기 성막 공정에서는, 상기 막의 표면측이 실리콘 리치(rich)가 되도록, 상기 기판측이 금속 리치가 되도록 성막하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항에 있어서,상기 성막 공정에서는, 금속 원자를 포함한 제1 원료와 실리콘 원자를 포함한 제2 원료를 이용해 각 원료를 기판에 간헐적으로 공급함과 동시에, 각 원료의 공급 유량 또는 공급 시간을 각각 변화시켜 성막하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항에 있어서,상기 금속 원자는 하프늄이고, 상기 막은 하프늄 실리케이트막인 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항에 있어서,상기 질화 처리 공정은, 상기 성막 공정을 실시하는 반응실과 동일한 반응 실내에서 수행되는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 기판 상에 금속 원자와 실리콘 원자를 포함한 막을 성막하는 성막 공정; 및상기 막 내에 질소를 도입하는 질소 도입 공정을 포함하며,상기 질소 도입 공정에서 막 내에 도입되는 질소의 농도를, 상기 성막 공정에서 형성한 막 내의 실리콘 농도에 의해 제어하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 기판을 반응실에 반입하는 반입 공정;복수 종류의 액체 원료를 조제하여 구성되는 제1 원료를 기화한 제1 원료 가스와, 복수 종류의 액체 원료를 상기 제1 원료와는 다른 혼합비로 조제하여 구성되거나 1 종류의 액체 원료로 구성되는 제2 원료를 기화한 제2 원료 가스를 기판에 공급하여 기판을 처리하는 기판 처리 공정; 및처리 후의 기판을 상기 반응실로부터 반출하는 반출 공정을 포함하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제10항에 있어서,상기 기판 처리 공정에서는, 상기 제1 원료 또는/및 상기 제2 원료의 공급 유량을 각각 변화시키는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제10항에 있어서,상기 기판 처리 공정에서는, 상기 제1 원료 가스와 상기 제2 원료 가스를 기 판에 동시에 공급하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제10항에 있어서,상기 기판 처리 공정에서는, 상기 제1 원료 가스와 상기 제2 원료 가스를 기판에 교대로 공급하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제10항에 있어서,상기 기판 처리 공정에서는, 상기 제1 원료 가스와 상기 제2 원료 가스의 공급과 이들 원료 가스와는 다른 제3 원료 가스의 공급을, 교대로 적어도 1회 이상 실시하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제10항에 있어서,상기 기판 처리 공정에서는, 상기 제1 원료 가스의 공급과 상기 제2 원료 가스의 공급 사이에 그들 원료 가스와는 다른 제3 원료 가스의 공급을 두어, 교대로 적어도 1회 이상 실시하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제10항에 있어서,상기 제1 원료를 구성하는 복수 종류의 액체 원료는 Hf액체 원료와 Si액체 원료이고, 상기 제 2 원료를 구성하는 1 종류의 액체 원료는 Hf액체 원료 또는 Si액체 원료이고, 상기 기판 처리 공정은 Hf 실리케이트막을 성막하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제16항에 있어서,상기 제1 원료의 Si 액체 원료와 Hf 액체 원료의 혼합비(Si 액체 원료/Hf 액체 원료)를 100~1000으로 하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제16항에 있어서,상기 기판 처리 공정에서는, 상기 제1 원료 또는/및 상기 제2 원료의 공급 유량을 각각 변화시키는 것으로, 상기 기판 상에 형성되는 Hf 실리케이트막의 조성비 Hf/(Hf+Si)를 심도 방향으로 0.1~1.0의 범위에서 제어하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제18항에 있어서,상기 기판 처리 공정에서 형성한 Hf 실리케이트막을 질화 처리하는 질화 처리 공정을 더 포함하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 기판을 처리하는 반응실;복수 종류의 액체 원료를 각각 수용하는 복수의 탱크;복수 종류의 액체 원료를 조제하는 조제 장치;복수 종류의 액체 원료를 조제 장치에 의해 조제하여 구성되는 제1 원료를 수용하는 제1 탱크;복수 종류의 액체 원료를 조제 장치에 의해 상기 제1 원료와는 다른 혼합비로 조제하여 구성되거나 또는 1 종류의 액체 원료로 구성되는 제2 원료를 수용하는 제2 탱크;상기 제1 원료의 액체 유량을 제어하는 제1 액체 유량 제어장치;상기 제2 원료의 액체 유량을 제어하는 제2 액체 유량 제어장치;유량 제어된 제1 원료를 기화하는 제1 기화기;유량 제어된 제2 원료를 기화하는 제2 기화기; 및기화에 의해 얻은 제1 원료 가스와 제2 원료 가스를 반응실에 공급하는 공급구를 포함하는 것을 특징으로 하는 기판 처리 장치.
- 제20항에 있어서,상기 기판 처리 공정 중에, 상기 제1 액체 유량 제어장치 또는/및 상기 제2 액체 유량 제어장치의 설정값을 변화시키도록 제어하는 제어장치를 포함하는 것을 특징으로 하는 기판 처리 장치.
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US (1) | US7531467B2 (ko) |
JP (1) | JPWO2005071723A1 (ko) |
KR (1) | KR100848226B1 (ko) |
CN (1) | CN100447962C (ko) |
WO (1) | WO2005071723A1 (ko) |
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KR20040076798A (ko) * | 2003-02-26 | 2004-09-03 | 가부시끼가이샤 도시바 | 반도체 장치 및 그 제조 방법 |
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