KR100587997B1 - 반도체 재료의 필름 또는 층, 및 그 필름 또는 층의제조방법 - Google Patents

반도체 재료의 필름 또는 층, 및 그 필름 또는 층의제조방법 Download PDF

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Publication number
KR100587997B1
KR100587997B1 KR1020037016800A KR20037016800A KR100587997B1 KR 100587997 B1 KR100587997 B1 KR 100587997B1 KR 1020037016800 A KR1020037016800 A KR 1020037016800A KR 20037016800 A KR20037016800 A KR 20037016800A KR 100587997 B1 KR100587997 B1 KR 100587997B1
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South Korea
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layer
semiconductor material
silicon
film
heat treatment
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Expired - Lifetime
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Korean (ko)
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KR20040015282A (ko
Inventor
머피브리안
발리크라인홀드
슈몰케류디거
폰암몬빌프리드
모리랜드제임스
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실트로닉 아게
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/40—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections
    • H10P95/402—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections of silicon bodies
    • H10P95/405—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections of silicon bodies using cavities formed by hydrogen or noble gas ion implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Recrystallisation Techniques (AREA)
  • Element Separation (AREA)
  • Manufacturing Of Electric Cables (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Manufacturing Of Magnetic Record Carriers (AREA)
KR1020037016800A 2001-06-28 2002-06-27 반도체 재료의 필름 또는 층, 및 그 필름 또는 층의제조방법 Expired - Lifetime KR100587997B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10131249A DE10131249A1 (de) 2001-06-28 2001-06-28 Verfahren zur Herstellung eines Films oder einer Schicht aus halbleitendem Material
DE10131249.0 2001-06-28
PCT/EP2002/007125 WO2003003430A2 (de) 2001-06-28 2002-06-27 Film oder schicht aus halbleitendem material und verfahren zur herstellung des films oder der schicht

Publications (2)

Publication Number Publication Date
KR20040015282A KR20040015282A (ko) 2004-02-18
KR100587997B1 true KR100587997B1 (ko) 2006-06-08

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KR1020037016800A Expired - Lifetime KR100587997B1 (ko) 2001-06-28 2002-06-27 반도체 재료의 필름 또는 층, 및 그 필름 또는 층의제조방법

Country Status (9)

Country Link
US (2) US7052948B2 (https=)
EP (2) EP1402567B1 (https=)
JP (1) JP4331593B2 (https=)
KR (1) KR100587997B1 (https=)
CN (1) CN100372060C (https=)
AT (1) ATE324670T1 (https=)
DE (3) DE10131249A1 (https=)
TW (1) TW575910B (https=)
WO (1) WO2003003430A2 (https=)

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DE602004010117D1 (de) * 2004-09-16 2007-12-27 St Microelectronics Srl Verfahren zur Hestellung von zusammengestzten Halbleiterplättchen mittels Schichtübertragung
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DE102005000826A1 (de) * 2005-01-05 2006-07-20 Siltronic Ag Halbleiterscheibe mit Silicium-Germanium-Schicht und Verfahren zu deren Herstellung
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FR2895563B1 (fr) * 2005-12-22 2008-04-04 Soitec Silicon On Insulator Procede de simplification d'une sequence de finition et structure obtenue par le procede
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US20090280588A1 (en) * 2008-05-06 2009-11-12 Leo Mathew Method of forming an electronic device including removing a differential etch layer
EP2161741B1 (en) * 2008-09-03 2014-06-11 Soitec Method for fabricating a semiconductor on insulator substrate with reduced SECCO defect density
US20100187572A1 (en) * 2009-01-26 2010-07-29 Cho Hans S Suspended mono-crystalline structure and method of fabrication from a heteroepitaxial layer
DE102009030298B4 (de) 2009-06-24 2012-07-12 Siltronic Ag Verfahren zur lokalen Politur einer Halbleiterscheibe
JP5585056B2 (ja) * 2009-11-19 2014-09-10 富士電機株式会社 Ｓｏｎ半導体基板の製造方法
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CN102294655A (zh) * 2011-08-10 2011-12-28 开化美盛电子科技有限公司 一种粘固硅棒的载体的制作方法
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Also Published As

Publication number Publication date
JP2004533726A (ja) 2004-11-04
DE10131249A1 (de) 2002-05-23
DE50206581D1 (de) 2006-06-01
US7417297B2 (en) 2008-08-26
US20060202310A1 (en) 2006-09-14
KR20040015282A (ko) 2004-02-18
TW575910B (en) 2004-02-11
EP1626440B1 (de) 2007-11-14
WO2003003430A2 (de) 2003-01-09
EP1402567A2 (de) 2004-03-31
DE50211238D1 (de) 2007-12-27
CN100372060C (zh) 2008-02-27
EP1626440A1 (de) 2006-02-15
WO2003003430A3 (de) 2003-03-20
US20040142542A1 (en) 2004-07-22
EP1402567B1 (de) 2006-04-26
CN1522461A (zh) 2004-08-18
US7052948B2 (en) 2006-05-30
JP4331593B2 (ja) 2009-09-16
ATE324670T1 (de) 2006-05-15

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