KR100438238B1 - 반도체 장치 및 그 제조 방법 - Google Patents

반도체 장치 및 그 제조 방법 Download PDF

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Publication number
KR100438238B1
KR100438238B1 KR10-2001-0058570A KR20010058570A KR100438238B1 KR 100438238 B1 KR100438238 B1 KR 100438238B1 KR 20010058570 A KR20010058570 A KR 20010058570A KR 100438238 B1 KR100438238 B1 KR 100438238B1
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South Korea
Prior art keywords
active region
film
transistor
region
buzz beak
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Expired - Fee Related
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KR10-2001-0058570A
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English (en)
Korean (ko)
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KR20020065324A (ko
Inventor
마키유키오
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미쓰비시덴키 가부시키가이샤
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Publication of KR20020065324A publication Critical patent/KR20020065324A/ko
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332Making the insulator
    • H10D64/01336Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01342Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid by deposition, e.g. evaporation, ALD or laser deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H10D64/516Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135Manufacturing their gate conductors
    • H10D84/0142Manufacturing their gate conductors the gate conductors having different shapes or dimensions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151Manufacturing their isolation regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0121Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] in regions recessed from the surface, e.g. in trenches or grooves
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/13Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903FET configuration adapted for use as static memory cell
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903FET configuration adapted for use as static memory cell
    • Y10S257/904FET configuration adapted for use as static memory cell with passive components,, e.g. polysilicon resistors

Landscapes

  • Element Separation (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR10-2001-0058570A 2001-02-06 2001-09-21 반도체 장치 및 그 제조 방법 Expired - Fee Related KR100438238B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2001-00029779 2001-02-06
JP2001029779A JP4592193B2 (ja) 2001-02-06 2001-02-06 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR20020065324A KR20020065324A (ko) 2002-08-13
KR100438238B1 true KR100438238B1 (ko) 2004-07-02

Family

ID=18894084

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2001-0058570A Expired - Fee Related KR100438238B1 (ko) 2001-02-06 2001-09-21 반도체 장치 및 그 제조 방법

Country Status (4)

Country Link
US (1) US7061128B2 (https=)
JP (1) JP4592193B2 (https=)
KR (1) KR100438238B1 (https=)
TW (1) TW508797B (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004058468A1 (de) * 2004-11-25 2006-06-01 Atmel Germany Gmbh MOS-Transistor mit reduziertem Kink-Effekt und Verfahren zu seiner Herstellung
KR100680958B1 (ko) * 2005-02-23 2007-02-09 주식회사 하이닉스반도체 피모스 트랜지스터의 제조방법
KR100760910B1 (ko) * 2005-12-29 2007-09-21 동부일렉트로닉스 주식회사 공통 컨택을 갖는 에스램 메모리 소자
JP2017069231A (ja) * 2015-09-28 2017-04-06 ソニー株式会社 Mos型電界効果トランジスタ、半導体集積回路、固体撮像素子、及び、電子機器
CN113130377A (zh) * 2021-04-14 2021-07-16 上海积塔半导体有限公司 减小硅局部氧化层的鸟嘴宽度的方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR930009059A (ko) * 1991-10-15 1993-05-22 문정환 반도체 소자의 액티브 영역확대 및 소자 격리방법
JP2000200878A (ja) * 1998-12-28 2000-07-18 Hitachi Ltd 半導体集積回路装置およびその製造方法

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JPH02246372A (ja) * 1989-03-20 1990-10-02 Fujitsu Ltd 半導体装置とその製造方法
US5135882A (en) * 1989-07-31 1992-08-04 Micron Technology, Inc. Technique for forming high-value inter-nodal coupling resistance for rad-hard applications in a double-poly, salicide process using local interconnect
JP2754977B2 (ja) * 1991-02-08 1998-05-20 日本電気株式会社 スタティックメモリ
JP3330962B2 (ja) * 1991-06-28 2002-10-07 同和鉱業株式会社 酸化物超電導体の製造方法
JP2697392B2 (ja) * 1991-07-30 1998-01-14 ソニー株式会社 相補型半導体装置の製造方法
KR970007589B1 (ko) * 1991-09-13 1997-05-10 니뽄 덴끼 가부시끼가이샤 정적 메모리 장치
WO1993007641A1 (fr) * 1991-10-01 1993-04-15 Hitachi, Ltd. Dispositif a circuits integres a semi-conducteur et fabrication de ce dispositif
JPH05198570A (ja) * 1991-10-01 1993-08-06 Hitachi Ltd 半導体集積回路装置及びその製造方法
JP3236720B2 (ja) * 1993-02-10 2001-12-10 三菱電機株式会社 半導体記憶装置およびその製造方法
US5358890A (en) * 1993-04-19 1994-10-25 Motorola Inc. Process for fabricating isolation regions in a semiconductor device
JPH08111462A (ja) * 1994-10-12 1996-04-30 Mitsubishi Electric Corp 半導体記憶装置およびその製造方法
JP3400891B2 (ja) * 1995-05-29 2003-04-28 三菱電機株式会社 半導体記憶装置およびその製造方法
US5650350A (en) * 1995-08-11 1997-07-22 Micron Technology, Inc. Semiconductor processing method of forming a static random access memory cell and static random access memory cell
JPH09252129A (ja) * 1996-03-15 1997-09-22 Sony Corp 電界効果トランジスタ及びその製造方法
US5741737A (en) * 1996-06-27 1998-04-21 Cypress Semiconductor Corporation MOS transistor with ramped gate oxide thickness and method for making same
JP3710880B2 (ja) * 1996-06-28 2005-10-26 株式会社東芝 不揮発性半導体記憶装置
KR100277878B1 (ko) * 1996-11-08 2001-02-01 김영환 트랜지스터의 구조 및 제조방법
JP3665183B2 (ja) * 1997-07-23 2005-06-29 株式会社日立製作所 半導体装置およびその製造方法
KR100247933B1 (ko) * 1997-08-22 2000-03-15 윤종용 버티드 콘택을 갖는 반도체 소자 및 그 제조방법
JP4326606B2 (ja) * 1998-03-26 2009-09-09 株式会社ルネサステクノロジ 半導体装置およびその製造方法
JP3415459B2 (ja) * 1998-12-07 2003-06-09 株式会社東芝 半導体装置及びその製造方法

Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
KR930009059A (ko) * 1991-10-15 1993-05-22 문정환 반도체 소자의 액티브 영역확대 및 소자 격리방법
JP2000200878A (ja) * 1998-12-28 2000-07-18 Hitachi Ltd 半導体集積回路装置およびその製造方法

Also Published As

Publication number Publication date
JP2002231828A (ja) 2002-08-16
TW508797B (en) 2002-11-01
JP4592193B2 (ja) 2010-12-01
US7061128B2 (en) 2006-06-13
KR20020065324A (ko) 2002-08-13
US20020105098A1 (en) 2002-08-08

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