JP4592193B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP4592193B2
JP4592193B2 JP2001029779A JP2001029779A JP4592193B2 JP 4592193 B2 JP4592193 B2 JP 4592193B2 JP 2001029779 A JP2001029779 A JP 2001029779A JP 2001029779 A JP2001029779 A JP 2001029779A JP 4592193 B2 JP4592193 B2 JP 4592193B2
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JP
Japan
Prior art keywords
active region
mos transistor
film
bird
semiconductor device
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Expired - Fee Related
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JP2001029779A
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English (en)
Japanese (ja)
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JP2002231828A (ja
JP2002231828A5 (https=
Inventor
幸生 牧
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Renesas Electronics Corp
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Renesas Electronics Corp
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Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2001029779A priority Critical patent/JP4592193B2/ja
Priority to US09/909,975 priority patent/US7061128B2/en
Priority to TW090122984A priority patent/TW508797B/zh
Priority to KR10-2001-0058570A priority patent/KR100438238B1/ko
Publication of JP2002231828A publication Critical patent/JP2002231828A/ja
Publication of JP2002231828A5 publication Critical patent/JP2002231828A5/ja
Application granted granted Critical
Publication of JP4592193B2 publication Critical patent/JP4592193B2/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01342—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid by deposition, e.g. evaporation, ALD or laser deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135—Manufacturing their gate conductors
    • H10D84/0142—Manufacturing their gate conductors the gate conductors having different shapes or dimensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144—Manufacturing their gate insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0121—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] in regions recessed from the surface, e.g. in trenches or grooves
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903—FET configuration adapted for use as static memory cell
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903—FET configuration adapted for use as static memory cell
    • Y10S257/904—FET configuration adapted for use as static memory cell with passive components,, e.g. polysilicon resistors

Landscapes

  • Element Separation (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2001029779A 2001-02-06 2001-02-06 半導体装置の製造方法 Expired - Fee Related JP4592193B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2001029779A JP4592193B2 (ja) 2001-02-06 2001-02-06 半導体装置の製造方法
US09/909,975 US7061128B2 (en) 2001-02-06 2001-07-23 Semiconductor device and manufacturing method of the same
TW090122984A TW508797B (en) 2001-02-06 2001-09-19 Semiconductor device and manufacturing method of the same
KR10-2001-0058570A KR100438238B1 (ko) 2001-02-06 2001-09-21 반도체 장치 및 그 제조 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001029779A JP4592193B2 (ja) 2001-02-06 2001-02-06 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2002231828A JP2002231828A (ja) 2002-08-16
JP2002231828A5 JP2002231828A5 (https=) 2008-03-27
JP4592193B2 true JP4592193B2 (ja) 2010-12-01

Family

ID=18894084

Family Applications (1)

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JP2001029779A Expired - Fee Related JP4592193B2 (ja) 2001-02-06 2001-02-06 半導体装置の製造方法

Country Status (4)

Country Link
US (1) US7061128B2 (https=)
JP (1) JP4592193B2 (https=)
KR (1) KR100438238B1 (https=)
TW (1) TW508797B (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004058468A1 (de) * 2004-11-25 2006-06-01 Atmel Germany Gmbh MOS-Transistor mit reduziertem Kink-Effekt und Verfahren zu seiner Herstellung
KR100680958B1 (ko) * 2005-02-23 2007-02-09 주식회사 하이닉스반도체 피모스 트랜지스터의 제조방법
KR100760910B1 (ko) * 2005-12-29 2007-09-21 동부일렉트로닉스 주식회사 공통 컨택을 갖는 에스램 메모리 소자
JP2017069231A (ja) * 2015-09-28 2017-04-06 ソニー株式会社 Ｍｏｓ型電界効果トランジスタ、半導体集積回路、固体撮像素子、及び、電子機器
CN113130377A (zh) * 2021-04-14 2021-07-16 上海积塔半导体有限公司 减小硅局部氧化层的鸟嘴宽度的方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02246372A (ja) * 1989-03-20 1990-10-02 Fujitsu Ltd 半導体装置とその製造方法
US5135882A (en) * 1989-07-31 1992-08-04 Micron Technology, Inc. Technique for forming high-value inter-nodal coupling resistance for rad-hard applications in a double-poly, salicide process using local interconnect
JP2754977B2 (ja) * 1991-02-08 1998-05-20 日本電気株式会社 スタティックメモリ
JP3330962B2 (ja) * 1991-06-28 2002-10-07 同和鉱業株式会社 酸化物超電導体の製造方法
JP2697392B2 (ja) * 1991-07-30 1998-01-14 ソニー株式会社 相補型半導体装置の製造方法
KR970007589B1 (ko) * 1991-09-13 1997-05-10 니뽄 덴끼 가부시끼가이샤 정적 메모리 장치
WO1993007641A1 (fr) * 1991-10-01 1993-04-15 Hitachi, Ltd. Dispositif a circuits integres a semi-conducteur et fabrication de ce dispositif
JPH05198570A (ja) * 1991-10-01 1993-08-06 Hitachi Ltd 半導体集積回路装置及びその製造方法
KR100189727B1 (ko) * 1991-10-15 1999-06-01 구본준 반도체 소자의 액티브 영역 확대 및 소자 격리방법
JP3236720B2 (ja) * 1993-02-10 2001-12-10 三菱電機株式会社 半導体記憶装置およびその製造方法
US5358890A (en) * 1993-04-19 1994-10-25 Motorola Inc. Process for fabricating isolation regions in a semiconductor device
JPH08111462A (ja) * 1994-10-12 1996-04-30 Mitsubishi Electric Corp 半導体記憶装置およびその製造方法
JP3400891B2 (ja) * 1995-05-29 2003-04-28 三菱電機株式会社 半導体記憶装置およびその製造方法
US5650350A (en) * 1995-08-11 1997-07-22 Micron Technology, Inc. Semiconductor processing method of forming a static random access memory cell and static random access memory cell
JPH09252129A (ja) * 1996-03-15 1997-09-22 Sony Corp 電界効果トランジスタ及びその製造方法
US5741737A (en) * 1996-06-27 1998-04-21 Cypress Semiconductor Corporation MOS transistor with ramped gate oxide thickness and method for making same
JP3710880B2 (ja) * 1996-06-28 2005-10-26 株式会社東芝 不揮発性半導体記憶装置
KR100277878B1 (ko) * 1996-11-08 2001-02-01 김영환 트랜지스터의 구조 및 제조방법
JP3665183B2 (ja) * 1997-07-23 2005-06-29 株式会社日立製作所 半導体装置およびその製造方法
KR100247933B1 (ko) * 1997-08-22 2000-03-15 윤종용 버티드 콘택을 갖는 반도체 소자 및 그 제조방법
JP4326606B2 (ja) * 1998-03-26 2009-09-09 株式会社ルネサステクノロジ 半導体装置およびその製造方法
JP3415459B2 (ja) * 1998-12-07 2003-06-09 株式会社東芝 半導体装置及びその製造方法
JP3955404B2 (ja) 1998-12-28 2007-08-08 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法

Also Published As

Publication number Publication date
JP2002231828A (ja) 2002-08-16
TW508797B (en) 2002-11-01
KR100438238B1 (ko) 2004-07-02
US7061128B2 (en) 2006-06-13
KR20020065324A (ko) 2002-08-13
US20020105098A1 (en) 2002-08-08

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