JPWO2024084621A5 - - Google Patents
Download PDFInfo
- Publication number
- JPWO2024084621A5 JPWO2024084621A5 JP2024551126A JP2024551126A JPWO2024084621A5 JP WO2024084621 A5 JPWO2024084621 A5 JP WO2024084621A5 JP 2024551126 A JP2024551126 A JP 2024551126A JP 2024551126 A JP2024551126 A JP 2024551126A JP WO2024084621 A5 JPWO2024084621 A5 JP WO2024084621A5
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- substrate
- drain pad
- wire
- cavity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2022/038906 WO2024084621A1 (ja) | 2022-10-19 | 2022-10-19 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPWO2024084621A1 JPWO2024084621A1 (https=) | 2024-04-25 |
| JPWO2024084621A5 true JPWO2024084621A5 (https=) | 2024-12-27 |
| JP7782714B2 JP7782714B2 (ja) | 2025-12-09 |
Family
ID=90737113
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024551126A Active JP7782714B2 (ja) | 2022-10-19 | 2022-10-19 | 半導体装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US20250351479A1 (https=) |
| JP (1) | JP7782714B2 (https=) |
| CN (1) | CN120019727A (https=) |
| WO (1) | WO2024084621A1 (https=) |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001267331A (ja) * | 2000-03-15 | 2001-09-28 | Hitachi Ltd | 半導体装置の製造方法 |
| JP2002270822A (ja) | 2001-03-09 | 2002-09-20 | Toshiba Corp | 半導体装置 |
| JP2008226871A (ja) * | 2007-03-08 | 2008-09-25 | Nec Corp | 半導体装置及びその製造方法 |
| US9871107B2 (en) * | 2015-05-22 | 2018-01-16 | Nxp Usa, Inc. | Device with a conductive feature formed over a cavity and method therefor |
| CN106252310B (zh) | 2016-06-02 | 2020-05-05 | 苏州能讯高能半导体有限公司 | 半导体器件及其制造方法 |
| JP6448865B1 (ja) * | 2018-02-01 | 2019-01-09 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
| CN111354640B (zh) | 2018-12-21 | 2022-08-12 | 苏州能讯高能半导体有限公司 | 一种半导体器件及其制备方法 |
| DE112019007477T5 (de) * | 2019-06-18 | 2022-03-10 | Mitsubishi Electric Corporation | Halbleitereinheit und herstelungsverfahren für eine halbleitereinheit |
| JP7456517B2 (ja) * | 2020-11-16 | 2024-03-27 | 三菱電機株式会社 | トランジスタ |
-
2022
- 2022-10-19 CN CN202280097058.5A patent/CN120019727A/zh active Pending
- 2022-10-19 WO PCT/JP2022/038906 patent/WO2024084621A1/ja not_active Ceased
- 2022-10-19 US US18/861,500 patent/US20250351479A1/en active Pending
- 2022-10-19 JP JP2024551126A patent/JP7782714B2/ja active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2024055908A5 (https=) | ||
| JP2021005732A5 (ja) | 半導体装置 | |
| JPS60116239U (ja) | パワ−mosfetの実装構造 | |
| TW200601576A (en) | Semiconductor element and wafer level chip size package therefor | |
| JP2006128455A5 (https=) | ||
| JP2002076040A5 (https=) | ||
| CN110783301A (zh) | 具有电隔离信号引线的引线上芯片半导体器件封装 | |
| JPWO2023189059A5 (https=) | ||
| JPWO2024084621A5 (https=) | ||
| JP2004273977A (ja) | 半導体装置及びその製造方法 | |
| JPWO2023002795A5 (https=) | ||
| TWI760836B (zh) | 公共源極平面網格陣列封裝 | |
| JP2003318360A5 (https=) | ||
| TW200929497A (en) | Chip packaging | |
| JP2021158320A5 (https=) | ||
| JPWO2021039631A5 (https=) | ||
| CN103229286B (zh) | 半导体装置 | |
| JPWO2023248718A5 (https=) | ||
| JPWO2023095659A5 (https=) | ||
| JPWO2023189054A5 (https=) | ||
| JP2023068518A5 (https=) | ||
| JPWO2023189037A5 (https=) | ||
| JP2000012741A (ja) | 半導体装置及びその製造方法 | |
| JPH01165133A (ja) | 半導体装置 | |
| JP2022186276A5 (https=) |