JP7782714B2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JP7782714B2
JP7782714B2 JP2024551126A JP2024551126A JP7782714B2 JP 7782714 B2 JP7782714 B2 JP 7782714B2 JP 2024551126 A JP2024551126 A JP 2024551126A JP 2024551126 A JP2024551126 A JP 2024551126A JP 7782714 B2 JP7782714 B2 JP 7782714B2
Authority
JP
Japan
Prior art keywords
semiconductor device
substrate
drain pad
cavity
wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2024551126A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2024084621A5 (https=
JPWO2024084621A1 (https=
Inventor
翼 角野
敏 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of JPWO2024084621A1 publication Critical patent/JPWO2024084621A1/ja
Publication of JPWO2024084621A5 publication Critical patent/JPWO2024084621A5/ja
Application granted granted Critical
Publication of JP7782714B2 publication Critical patent/JP7782714B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/80FETs having rectifying junction gate electrodes
    • H10D30/87FETs having Schottky gate electrodes, e.g. metal-semiconductor FETs [MESFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117Shapes of semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251Source or drain electrodes for field-effect devices
    • H10D64/257Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/482Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes for individual devices provided for in groups H10D8/00 - H10D48/00, e.g. for power transistors
    • H10W20/483Interconnections over air gaps, e.g. air bridges
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/921Structures or relative sizes of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/934Cross-sectional shape, i.e. in side view

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Wire Bonding (AREA)
JP2024551126A 2022-10-19 2022-10-19 半導体装置 Active JP7782714B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2022/038906 WO2024084621A1 (ja) 2022-10-19 2022-10-19 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2024084621A1 JPWO2024084621A1 (https=) 2024-04-25
JPWO2024084621A5 JPWO2024084621A5 (https=) 2024-12-27
JP7782714B2 true JP7782714B2 (ja) 2025-12-09

Family

ID=90737113

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024551126A Active JP7782714B2 (ja) 2022-10-19 2022-10-19 半導体装置

Country Status (4)

Country Link
US (1) US20250351479A1 (https=)
JP (1) JP7782714B2 (https=)
CN (1) CN120019727A (https=)
WO (1) WO2024084621A1 (https=)

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001267331A (ja) 2000-03-15 2001-09-28 Hitachi Ltd 半導体装置の製造方法
JP2002270822A (ja) 2001-03-09 2002-09-20 Toshiba Corp 半導体装置
JP2008226871A (ja) 2007-03-08 2008-09-25 Nec Corp 半導体装置及びその製造方法
US20160343809A1 (en) 2015-05-22 2016-11-24 Freescale Semiconductor, Inc. Device with a conductive feature formed over a cavity and method therefor
CN106252310A (zh) 2016-06-02 2016-12-21 苏州能讯高能半导体有限公司 半导体器件及其制造方法
WO2019150526A1 (ja) 2018-02-01 2019-08-08 三菱電機株式会社 半導体装置およびその製造方法
CN111354640A (zh) 2018-12-21 2020-06-30 苏州能讯高能半导体有限公司 一种半导体器件及其制备方法
WO2020255259A1 (ja) 2019-06-18 2020-12-24 三菱電機株式会社 半導体装置およびその製造方法
WO2022102137A1 (ja) 2020-11-16 2022-05-19 三菱電機株式会社 トランジスタ

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001267331A (ja) 2000-03-15 2001-09-28 Hitachi Ltd 半導体装置の製造方法
JP2002270822A (ja) 2001-03-09 2002-09-20 Toshiba Corp 半導体装置
JP2008226871A (ja) 2007-03-08 2008-09-25 Nec Corp 半導体装置及びその製造方法
US20160343809A1 (en) 2015-05-22 2016-11-24 Freescale Semiconductor, Inc. Device with a conductive feature formed over a cavity and method therefor
CN106252310A (zh) 2016-06-02 2016-12-21 苏州能讯高能半导体有限公司 半导体器件及其制造方法
WO2019150526A1 (ja) 2018-02-01 2019-08-08 三菱電機株式会社 半導体装置およびその製造方法
CN111354640A (zh) 2018-12-21 2020-06-30 苏州能讯高能半导体有限公司 一种半导体器件及其制备方法
WO2020255259A1 (ja) 2019-06-18 2020-12-24 三菱電機株式会社 半導体装置およびその製造方法
WO2022102137A1 (ja) 2020-11-16 2022-05-19 三菱電機株式会社 トランジスタ

Also Published As

Publication number Publication date
CN120019727A (zh) 2025-05-16
JPWO2024084621A1 (https=) 2024-04-25
US20250351479A1 (en) 2025-11-13
WO2024084621A1 (ja) 2024-04-25

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