JPWO2007058096A1 - 実装基板および電子機器 - Google Patents
実装基板および電子機器 Download PDFInfo
- Publication number
- JPWO2007058096A1 JPWO2007058096A1 JP2007545204A JP2007545204A JPWO2007058096A1 JP WO2007058096 A1 JPWO2007058096 A1 JP WO2007058096A1 JP 2007545204 A JP2007545204 A JP 2007545204A JP 2007545204 A JP2007545204 A JP 2007545204A JP WO2007058096 A1 JPWO2007058096 A1 JP WO2007058096A1
- Authority
- JP
- Japan
- Prior art keywords
- curved
- substrate
- semiconductor package
- mounting
- pedestal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0284—Details of three-dimensional rigid printed circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0014—Shaping of the substrate, e.g. by moulding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2405—Shape
- H01L2224/24051—Conformal with the semiconductor or solid-state device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2499—Auxiliary members for HDI interconnects, e.g. spacers, alignment aids
- H01L2224/24996—Auxiliary members for HDI interconnects, e.g. spacers, alignment aids being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/24998—Reinforcing structures, e.g. ramp-like support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/76—Apparatus for connecting with build-up interconnects
- H01L2224/7615—Means for depositing
- H01L2224/76151—Means for direct writing
- H01L2224/76155—Jetting means, e.g. ink jet
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/821—Forming a build-up interconnect
- H01L2224/82101—Forming a build-up interconnect by additive methods, e.g. direct writing
- H01L2224/82102—Forming a build-up interconnect by additive methods, e.g. direct writing using jetting, e.g. ink jet
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19102—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
- H01L2924/19103—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device interposed between the semiconductor or solid-state device and the die mounting substrate, i.e. chip-on-passive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19102—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
- H01L2924/19104—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device on the semiconductor or solid-state device, i.e. passive-on-chip
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0187—Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0191—Dielectric layers wherein the thickness of the dielectric plays an important role
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09018—Rigid curved substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09045—Locally raised area or protrusion of insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09118—Moulded substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09436—Pads or lands on permanent coating which covers the other conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10439—Position of a single component
- H05K2201/10477—Inverted
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/10515—Stacked components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/1053—Mounted components directly electrically connected to each other, i.e. not via the PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
- H05K2203/1469—Circuit made after mounting or encapsulation of the components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
- H05K2203/302—Bending a rigid substrate; Breaking rigid substrates by bending
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Structure Of Printed Boards (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
10 曲面基板(配線基板)
11 基材
12 配線層
13 絶縁層
13a 台座部
13b 肩部
13c 凹部
14 ビア
15 配線層
15a、15b パッド部
16 第2絶縁層
20 半導体パッケージ
21 外部端子
30 はんだボール
40、41、42、43、44 プレス型
50 電子部品
60 曲面基板
61 配線基板
61a 絶縁層
61b 配線層
61c ビア
61d 配線層
62 台座部
63 配線層(配線パターン)
63a パッド部
110 半導体装置
112 基板
114 半導体チップ
116 バンプ
118 構造物
120 接着剤
122 アンダーフィル
124 ボールバンプ
126 凹陥部
128 隙間
201 半導体パッケージ
202 はんだボール
203 基板
204 パッド
301 曲面基板
302 チップ
302a 電極
303 半田バンプ
303a チップバンプ
303b 基板バンプ
304 アンダーフィル樹脂
305 加熱冷却ヘッド
306 吸着穴
本発明の実施形態1に係る実装基板について図面を用いて説明する。図1は、本発明の実施形態1に係る実装基板の構成を模式的に示した断面図である。図2は、本発明の実施形態1に係る実装基板における曲面基板の構成を模式的に示した断面図である。図3は、本発明の実施形態1に係る実装基板における基材の第1の曲面形状を模式的に示した(A)上面図、(B)X−X´間の断面図、(C)Y−Y´間の断面図である。図4は、本発明の実施形態1に係る実装基板における基材の第2の曲面形状を模式的に示した(A)上面図、(B)X−X´間の断面図、(C)Y−Y´間の断面図である。
本発明の実施形態2に係る実装基板について図面を用いて説明する。図7は、本発明の実施形態2に係る実装基板の構成を模式的に示した断面図である。
本発明の実施形態3に係る実装基板について図面を用いて説明する。図9は、本発明の実施形態3に係る実装基板の構成を模式的に示した断面図である。
本発明の実施形態4に係る実装基板について図面を用いて説明する。図11は、本発明の実施形態4に係る実装基板の構成を模式的に示した断面図である。
本発明の実施形態5に係る実装基板について図面を用いて説明する。図13は、本発明の実施形態5に係る実装基板の構成を模式的に示した断面図であり、(A)は凸面側に半導体パッケージを実装した実装基板、(B)は凹面側に半導体パッケージを実装した実装基板に関するものである。
本発明の実施形態6に係る実装基板について図面を用いて説明する。図14は、本発明の実施形態6に係る実装基板の構成を模式的に示した断面図であり、(A)は凸面側に半導体パッケージを実装した実装基板、(B)は凹面側に半導体パッケージを実装した実装基板に関するものである。
本発明の実施形態7に係る実装基板について図面を用いて説明する。図15は、本発明の実施形態7に係る実装基板の構成を模式的に示した断面図であり、(A)は凸面側に半導体パッケージを実装した実装基板、(B)は凹面側に半導体パッケージを実装した実装基板に関するものである。
本発明の実施形態8に係る実装基板について図面を用いて説明する。図16は、本発明の実施形態8に係る実装基板の構成を模式的に示した断面図であり、(A)は凸面側に半導体パッケージを実装した実装基板、(B)は凹面側に半導体パッケージを実装した実装基板に関するものである。
Claims (21)
- 少なくとも一部に曲面を有する曲面基板上に半導体パッケージが実装された実装基板であって、
前記曲面基板は、
曲面部位のうち前記半導体パッケージが搭載される部位に配設されるとともに上面が平坦に形成された絶縁材料よりなる台座部と、
前記台座部の平坦面上に配設される複数のパッド部と、
を備え、
前記半導体パッケージは、前記パッド部上に搭載されることを特徴とする実装基板。 - 前記台座部は、前記曲面基板において用いられている絶縁層を成型して構成されたことを特徴とする請求項1記載の実装基板。
- 前記絶縁層は、前記台座部と隣接する部位に表面が平坦な肩部を有し、
前記肩部の平坦面は、曲面部位の接線と平行となるよう構成されたことを特徴とする請求項1又は2記載の実装基板。 - 前記台座部上の平坦面上に配設される複数の第2パッド部と、
前記第2パッド部上に搭載される電子部品と、
を備えることを特徴とする請求項3記載の実装基板。 - 前記台座部は、隣り合う前記パッド部間の領域に凹部を有することを特徴とする請求項1乃至4のいずれか一に記載の実装基板。
- 前記台座部は、第2絶縁層を内包して構成されたことを特徴とする請求項1乃至5のいずれか一に記載の実装基板。
- 前記第2絶縁層は、フィルム状の樹脂を積層した積層体、熱可塑性樹脂、熱可塑性樹脂および熱硬化性樹脂を含有したハイブリッド型樹脂、及び、無機材料のいずれか一つよりなることを特徴とする請求項6記載の実装基板。
- 前記台座部は、前記曲面基板において用いられている絶縁層以外の絶縁材料を成型して構成されたことを特徴とする請求項1記載の実装基板。
- 前記台座部は、フィラーを含有した樹脂材料よりなることを特徴とする請求項8記載の実装基板。
- 前記台座部の内部に、電子部品が実装されていることを特徴とする請求項8又は9記載の実装基板。
- 少なくとも一部に曲面を有する曲面基板上に半導体パッケージが実装された実装基板であって、
前記曲面基板は、曲面部位のうち前記半導体パッケージが搭載される部位に配設されるとともに絶縁材料よりなる台座部を備え、
前記台座部は、前記曲面基板において用いられている絶縁層以外の絶縁材料を成型して構成され、
前記半導体パッケージは、前記台座部の内部に配され、
前記半導体パッケージの外部端子は、基板面と反対側に配されるとともに、前記台座部から露出し、
少なくとも前記台座部および前記半導体パッケージ上に配設されるとともに、前記曲面基板の配線層と前記半導体パッケージの前記外部端子を電気的に接続する配線パターンを備えることを特徴とする実装基板。 - 前記半導体パッケージの前記外部端子上に前記配線パターンのパッド部を介して搭載された電子部品を備えることを特徴とする請求項11記載の実装基板。
- 少なくとも一部に曲面を有する曲面基板であって、
曲面部位のうち半導体パッケージが搭載される部位に配設されるとともに上面が平坦に形成された絶縁材料よりなる台座部と、
前記台座部の平坦面上に配設される複数のパッド部と、
を備えることを特徴とする曲面基板。 - 前記台座部は、前記曲面基板において用いられている絶縁層を成型して構成されたことを特徴とする請求項13記載の曲面基板。
- 前記絶縁層は、前記台座部と隣接する部位に表面が平坦な肩部を有し、
前記肩部の平坦面は、曲面部位の接線と平行となるよう構成されたことを特徴とする請求項13又は14記載の曲面基板。 - 前記台座部上の平坦面上に配設される複数の第2パッド部と、
前記第2パッド部上に搭載される電子部品と、
を備えることを特徴とする請求項15記載の曲面基板。 - 前記台座部は、隣り合う前記パッド部間の領域に凹部を有することを特徴とする請求項13乃至16のいずれか一に記載の曲面基板。
- 前記台座部は、第2絶縁層を内包して構成されたことを特徴とする請求項13乃至17のいずれか一に記載の曲面基板。
- 前記第2絶縁層は、フィルム状の樹脂を積層した積層体、熱可塑性樹脂、熱可塑性樹脂および熱硬化性樹脂を含有したハイブリッド型樹脂、及び、無機材料のいずれか一つよりなることを特徴とする請求項18記載の曲面基板。
- 請求項1乃至12のいずれか一に記載の実装基板を含んで構成されたことを特徴とする電子機器。
- 請求項13乃至19のいずれか一に記載の曲面基板を含んで構成されたされたことを特徴とする電子機器。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007545204A JP5088138B2 (ja) | 2005-11-18 | 2006-11-08 | 実装基板および電子機器 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005334649 | 2005-11-18 | ||
JP2005334649 | 2005-11-18 | ||
PCT/JP2006/322251 WO2007058096A1 (ja) | 2005-11-18 | 2006-11-08 | 実装基板および電子機器 |
JP2007545204A JP5088138B2 (ja) | 2005-11-18 | 2006-11-08 | 実装基板および電子機器 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2007058096A1 true JPWO2007058096A1 (ja) | 2009-04-30 |
JP5088138B2 JP5088138B2 (ja) | 2012-12-05 |
Family
ID=38048483
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007545204A Active JP5088138B2 (ja) | 2005-11-18 | 2006-11-08 | 実装基板および電子機器 |
Country Status (4)
Country | Link |
---|---|
US (3) | US20090002973A1 (ja) |
JP (1) | JP5088138B2 (ja) |
CN (1) | CN101310570B (ja) |
WO (1) | WO2007058096A1 (ja) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100300734A1 (en) * | 2009-05-27 | 2010-12-02 | Raytheon Company | Method and Apparatus for Building Multilayer Circuits |
TWI458413B (zh) * | 2011-10-05 | 2014-10-21 | Three - dimensional surface laser guided through filling line method | |
US9399177B2 (en) | 2011-10-13 | 2016-07-26 | Building Creative Kids, Llc | Toy couplers including a plurality of block retaining channels |
US10398998B2 (en) | 2011-10-13 | 2019-09-03 | Building Creative Kids, Llc | Toy couplers including a plurality of block retaining channels |
USD877263S1 (en) | 2011-10-13 | 2020-03-03 | Building Creative Kids, Llc | Toy coupler |
JP2013149948A (ja) * | 2011-12-20 | 2013-08-01 | Ngk Spark Plug Co Ltd | 配線基板及びその製造方法 |
US20130170106A1 (en) * | 2012-01-03 | 2013-07-04 | Peter M. Rubino | Cellular telephone separation apparatus |
US20140233166A1 (en) * | 2013-02-19 | 2014-08-21 | Norman E. O'Shea | Flexible powered cards and devices, and methods of manufacturing flexible powered cards and devices |
CN105706537B (zh) * | 2013-11-05 | 2019-11-01 | 飞利浦照明控股有限公司 | 组件和制造组件的方法 |
WO2015199128A1 (ja) * | 2014-06-27 | 2015-12-30 | 日本電気株式会社 | 電子機器およびその製造方法 |
KR102256293B1 (ko) * | 2014-07-28 | 2021-05-26 | 삼성에스디아이 주식회사 | 배터리 팩 |
DE102014013564A1 (de) * | 2014-09-18 | 2016-03-24 | Hueck Folien Gmbh | Verfahren zur Herstellung eines umgeformten Schaltungsträgers, sowie umgeformter Schaltungsträger |
TWI517114B (zh) * | 2014-09-26 | 2016-01-11 | 友達光電股份有限公司 | 具不同曲率設計之顯示模組 |
CN208145472U (zh) | 2015-01-06 | 2018-11-27 | 建筑创造性儿童有限责任公司 | 包括可调节连接夹、构建用板和面板的玩具构建系统 |
US20160240435A1 (en) | 2015-02-17 | 2016-08-18 | Intel Corporation | Microelectronic interconnect adaptor |
KR101753225B1 (ko) | 2015-06-02 | 2017-07-19 | 에더트로닉스코리아 (주) | Lds 공법을 이용한 적층 회로 제작 방법 |
US10667396B2 (en) * | 2017-08-25 | 2020-05-26 | Tactotek Oy | Multilayer structure for hosting electronics and related method of manufacture |
US10165689B1 (en) * | 2017-08-30 | 2018-12-25 | Xerox Corporation | Method for forming circuits for three-dimensional parts and devices formed thereby |
CN107579047B (zh) * | 2017-09-15 | 2019-09-03 | 中国电子科技集团公司第五十八研究所 | 曲面基板的高可靠互连结构 |
FR3084556B1 (fr) * | 2018-07-30 | 2020-11-06 | Commissariat Energie Atomique | Structure electronique souple et son procede d'elaboration. |
US11282716B2 (en) * | 2019-11-08 | 2022-03-22 | International Business Machines Corporation | Integration structure and planar joining |
WO2022013929A1 (ja) * | 2020-07-13 | 2022-01-20 | オリンパス株式会社 | 電子モジュール、撮像ユニット、内視鏡及び電子モジュールの製造方法 |
WO2023032093A1 (ja) * | 2021-09-01 | 2023-03-09 | オリンパスメディカルシステムズ株式会社 | 電子部品保持部材および内視鏡 |
WO2023068583A1 (ko) * | 2021-10-20 | 2023-04-27 | 삼성전자 주식회사 | 굽힘 영역에서의 내구도가 증가된 인쇄 회로 기판 및 이를 포함하는 전자 장치 |
Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01289186A (ja) * | 1988-05-16 | 1989-11-21 | Toyo Commun Equip Co Ltd | プリント基板 |
JPH0466117B2 (ja) * | 1985-03-08 | 1992-10-22 | Three Bond Co Ltd | |
JPH05110255A (ja) * | 1991-10-15 | 1993-04-30 | Mitsubishi Electric Corp | 曲面多層配線板の製造方法 |
JPH05291428A (ja) * | 1992-04-15 | 1993-11-05 | Matsushita Electric Works Ltd | 半導体装置実装用基板の製法 |
JPH06168985A (ja) * | 1992-11-30 | 1994-06-14 | Sharp Corp | 半導体素子の実装構造 |
JPH06334279A (ja) * | 1993-05-20 | 1994-12-02 | Minolta Camera Co Ltd | 多層フレキシブル電装基板 |
JPH07221433A (ja) * | 1994-02-07 | 1995-08-18 | Shinko Electric Ind Co Ltd | セラミック回路基板及びその製造方法 |
JPH09186042A (ja) * | 1996-01-08 | 1997-07-15 | Murata Mfg Co Ltd | 積層電子部品 |
WO1998032170A1 (fr) * | 1997-01-17 | 1998-07-23 | Seiko Epson Corporation | Composant electronique, dispositif a semiconducteur, procede de fabrication, carte imprimee et equipement electronique |
JP2002353595A (ja) * | 2001-05-28 | 2002-12-06 | Matsushita Electric Works Ltd | 電子回路部品及びその製造方法 |
JP2003133693A (ja) * | 2001-10-29 | 2003-05-09 | Denso Corp | 配線形成方法、回路形成方法、配線形成装置、回路形成装置 |
JP2005117073A (ja) * | 2005-01-27 | 2005-04-28 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4548451A (en) * | 1984-04-27 | 1985-10-22 | International Business Machines Corporation | Pinless connector interposer and method for making the same |
US5471151A (en) * | 1990-02-14 | 1995-11-28 | Particle Interconnect, Inc. | Electrical interconnect using particle enhanced joining of metal surfaces |
JPH0466117A (ja) | 1990-07-05 | 1992-03-02 | Daikin Ind Ltd | 粒体の改質装置 |
US5328553A (en) * | 1993-02-02 | 1994-07-12 | Motorola Inc. | Method for fabricating a semiconductor device having a planar surface |
US5940729A (en) * | 1996-04-17 | 1999-08-17 | International Business Machines Corp. | Method of planarizing a curved substrate and resulting structure |
US6027958A (en) * | 1996-07-11 | 2000-02-22 | Kopin Corporation | Transferred flexible integrated circuit |
US6288451B1 (en) * | 1998-06-24 | 2001-09-11 | Vanguard International Semiconductor Corporation | Flip-chip package utilizing a printed circuit board having a roughened surface for increasing bond strength |
JP3395164B2 (ja) | 1998-11-05 | 2003-04-07 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 半導体装置 |
TW460927B (en) * | 1999-01-18 | 2001-10-21 | Toshiba Corp | Semiconductor device, mounting method for semiconductor device and manufacturing method for semiconductor device |
US6617671B1 (en) * | 1999-06-10 | 2003-09-09 | Micron Technology, Inc. | High density stackable and flexible substrate-based semiconductor device modules |
JP2003318218A (ja) | 2002-04-24 | 2003-11-07 | Mitsubishi Electric Corp | 曲面チップ基板、その製造方法、および、バンプ形成装置 |
WO2004015758A1 (ja) * | 2002-08-09 | 2004-02-19 | Fujitsu Limited | 半導体装置及びその製造方法 |
-
2006
- 2006-11-08 JP JP2007545204A patent/JP5088138B2/ja active Active
- 2006-11-08 CN CN2006800428446A patent/CN101310570B/zh active Active
- 2006-11-08 US US12/093,496 patent/US20090002973A1/en not_active Abandoned
- 2006-11-08 WO PCT/JP2006/322251 patent/WO2007058096A1/ja active Application Filing
-
2011
- 2011-06-10 US US13/158,037 patent/US8625296B2/en active Active
-
2013
- 2013-09-03 US US14/016,707 patent/US8913398B2/en active Active
Patent Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0466117B2 (ja) * | 1985-03-08 | 1992-10-22 | Three Bond Co Ltd | |
JPH01289186A (ja) * | 1988-05-16 | 1989-11-21 | Toyo Commun Equip Co Ltd | プリント基板 |
JPH05110255A (ja) * | 1991-10-15 | 1993-04-30 | Mitsubishi Electric Corp | 曲面多層配線板の製造方法 |
JPH05291428A (ja) * | 1992-04-15 | 1993-11-05 | Matsushita Electric Works Ltd | 半導体装置実装用基板の製法 |
JPH06168985A (ja) * | 1992-11-30 | 1994-06-14 | Sharp Corp | 半導体素子の実装構造 |
JPH06334279A (ja) * | 1993-05-20 | 1994-12-02 | Minolta Camera Co Ltd | 多層フレキシブル電装基板 |
JPH07221433A (ja) * | 1994-02-07 | 1995-08-18 | Shinko Electric Ind Co Ltd | セラミック回路基板及びその製造方法 |
JPH09186042A (ja) * | 1996-01-08 | 1997-07-15 | Murata Mfg Co Ltd | 積層電子部品 |
WO1998032170A1 (fr) * | 1997-01-17 | 1998-07-23 | Seiko Epson Corporation | Composant electronique, dispositif a semiconducteur, procede de fabrication, carte imprimee et equipement electronique |
JP2002353595A (ja) * | 2001-05-28 | 2002-12-06 | Matsushita Electric Works Ltd | 電子回路部品及びその製造方法 |
JP2003133693A (ja) * | 2001-10-29 | 2003-05-09 | Denso Corp | 配線形成方法、回路形成方法、配線形成装置、回路形成装置 |
JP2005117073A (ja) * | 2005-01-27 | 2005-04-28 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
Also Published As
Publication number | Publication date |
---|---|
US20090002973A1 (en) | 2009-01-01 |
US20140003015A1 (en) | 2014-01-02 |
US8625296B2 (en) | 2014-01-07 |
CN101310570B (zh) | 2010-11-10 |
JP5088138B2 (ja) | 2012-12-05 |
CN101310570A (zh) | 2008-11-19 |
US8913398B2 (en) | 2014-12-16 |
US20110242780A1 (en) | 2011-10-06 |
WO2007058096A1 (ja) | 2007-05-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5088138B2 (ja) | 実装基板および電子機器 | |
JP5195422B2 (ja) | 配線基板、実装基板及び電子装置 | |
JP3709882B2 (ja) | 回路モジュールとその製造方法 | |
US8115316B2 (en) | Packaging board, semiconductor module, and portable apparatus | |
JPWO2007126090A1 (ja) | 回路基板、電子デバイス装置及び回路基板の製造方法 | |
JP2010262992A (ja) | 半導体モジュールおよび携帯機器 | |
JP3894091B2 (ja) | Icチップ内蔵多層基板及びその製造方法 | |
JP6783724B2 (ja) | 回路基板 | |
JP4588046B2 (ja) | 回路装置およびその製造方法 | |
JPWO2009037833A1 (ja) | 立体プリント配線板およびその製造方法ならびに電子部品モジュール | |
JP2001274324A (ja) | 積層型半導体装置用半導体搭載用基板、半導体装置及び積層型半導体装置 | |
US8129846B2 (en) | Board adapted to mount an electronic device, semiconductor module and manufacturing method therefor, and portable device | |
KR20060121081A (ko) | 전자 부품 실장 방법 | |
JP5134899B2 (ja) | 半導体モジュール、半導体モジュールの製造方法および携帯機器 | |
JP4438389B2 (ja) | 半導体装置の製造方法 | |
US20120266463A1 (en) | Method for manufacturing printed circuit board | |
JP5295211B2 (ja) | 半導体モジュールの製造方法 | |
KR101109287B1 (ko) | 전자부품 내장형 인쇄회로기판 및 그 제조방법 | |
JP2009004813A (ja) | 半導体搭載用配線基板 | |
JP2004266271A (ja) | 電子部品の実装体及びその製造方法 | |
JP4779668B2 (ja) | 積層基板の製造方法 | |
JP2008177382A (ja) | 熱伝導基板とその製造方法及びこれを用いた回路モジュール | |
JP4433399B2 (ja) | 半導体装置の製造方法及び三次元半導体装置 | |
KR101969643B1 (ko) | 리지드 플렉시블 회로기판 제조방법 | |
JP2008135483A (ja) | 電子部品内蔵基板およびその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20091027 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110906 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20111107 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20111206 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120206 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120814 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120827 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150921 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5088138 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
S131 | Request for trust registration of transfer of right |
Free format text: JAPANESE INTERMEDIATE CODE: R313135 |
|
SZ02 | Written request for trust registration |
Free format text: JAPANESE INTERMEDIATE CODE: R313Z02 |
|
S131 | Request for trust registration of transfer of right |
Free format text: JAPANESE INTERMEDIATE CODE: R313135 |
|
SZ02 | Written request for trust registration |
Free format text: JAPANESE INTERMEDIATE CODE: R313Z02 |
|
S631 | Written request for registration of reclamation of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313631 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
S131 | Request for trust registration of transfer of right |
Free format text: JAPANESE INTERMEDIATE CODE: R313135 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |