JPS6318867B2 - - Google Patents

Info

Publication number
JPS6318867B2
JPS6318867B2 JP55164018A JP16401880A JPS6318867B2 JP S6318867 B2 JPS6318867 B2 JP S6318867B2 JP 55164018 A JP55164018 A JP 55164018A JP 16401880 A JP16401880 A JP 16401880A JP S6318867 B2 JPS6318867 B2 JP S6318867B2
Authority
JP
Japan
Prior art keywords
ion implantation
layer
memory
transistor
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55164018A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5687371A (en
Inventor
Yakobusu Eruin
Shuwaabe Ururitsuhi
Takakusu Tetsuzee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of JPS5687371A publication Critical patent/JPS5687371A/ja
Publication of JPS6318867B2 publication Critical patent/JPS6318867B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/299—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations
    • H10D62/307—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations the doping variations being parallel to the channel lengths
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/8311—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] the IGFETs characterised by having different channel structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/8314—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] the IGFETs characterised by having gate insulating layers with different properties

Landscapes

  • Non-Volatile Memory (AREA)
JP16401880A 1979-11-23 1980-11-20 Method of manufacturing mnos memory transistor Granted JPS5687371A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19792947350 DE2947350A1 (de) 1979-11-23 1979-11-23 Verfahren zum herstellen von mnos-speichertransistoren mit sehr kurzer kanallaenge in silizium-gate-technologie

Publications (2)

Publication Number Publication Date
JPS5687371A JPS5687371A (en) 1981-07-15
JPS6318867B2 true JPS6318867B2 (enExample) 1988-04-20

Family

ID=6086750

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16401880A Granted JPS5687371A (en) 1979-11-23 1980-11-20 Method of manufacturing mnos memory transistor

Country Status (4)

Country Link
US (1) US4342149A (enExample)
EP (1) EP0029554B1 (enExample)
JP (1) JPS5687371A (enExample)
DE (1) DE2947350A1 (enExample)

Families Citing this family (84)

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JPS5952849A (ja) * 1982-09-20 1984-03-27 Fujitsu Ltd 半導体装置の製造方法
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US4509991A (en) * 1983-10-06 1985-04-09 International Business Machines Corporation Single mask process for fabricating CMOS structure
US4535532A (en) * 1984-04-09 1985-08-20 At&T Bell Laboratories Integrated circuit contact technique
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DE3581797D1 (de) * 1984-12-27 1991-03-28 Toshiba Kawasaki Kk Misfet mit niedrigdotiertem drain und verfahren zu seiner herstellung.
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KR900000065B1 (ko) * 1985-08-13 1990-01-19 가부시끼가이샤 도오시바 독출전용 반도체기억장치와 그 제조방법
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US5021851A (en) * 1988-05-03 1991-06-04 Texas Instruments Incorporated NMOS source/drain doping with both P and As
US4943537A (en) * 1988-06-23 1990-07-24 Dallas Semiconductor Corporation CMOS integrated circuit with reduced susceptibility to PMOS punchthrough
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US5650340A (en) * 1994-08-18 1997-07-22 Sun Microsystems, Inc. Method of making asymmetric low power MOS devices
US5534449A (en) * 1995-07-17 1996-07-09 Micron Technology, Inc. Methods of forming complementary metal oxide semiconductor (CMOS) integrated circuitry
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JP3143366B2 (ja) * 1995-07-31 2001-03-07 三洋電機株式会社 Ｃｍｏｓ半導体装置の製造方法
US5817564A (en) * 1996-06-28 1998-10-06 Harris Corporation Double diffused MOS device and method
US6297096B1 (en) 1997-06-11 2001-10-02 Saifun Semiconductors Ltd. NROM fabrication method
US5966603A (en) * 1997-06-11 1999-10-12 Saifun Semiconductors Ltd. NROM fabrication method with a periphery portion
IL125604A (en) 1997-07-30 2004-03-28 Saifun Semiconductors Ltd Non-volatile electrically erasable and programmble semiconductor memory cell utilizing asymmetrical charge
US6768165B1 (en) * 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
US6633496B2 (en) 1997-12-12 2003-10-14 Saifun Semiconductors Ltd. Symmetric architecture for memory cells having widely spread metal bit lines
US6430077B1 (en) 1997-12-12 2002-08-06 Saifun Semiconductors Ltd. Method for regulating read voltage level at the drain of a cell in a symmetric array
US6633499B1 (en) 1997-12-12 2003-10-14 Saifun Semiconductors Ltd. Method for reducing voltage drops in symmetric array architectures
US6064102A (en) * 1997-12-17 2000-05-16 Advanced Micro Devices, Inc. Semiconductor device having gate electrodes with different gate insulators and fabrication thereof
US6215148B1 (en) 1998-05-20 2001-04-10 Saifun Semiconductors Ltd. NROM cell with improved programming, erasing and cycling
US6348711B1 (en) 1998-05-20 2002-02-19 Saifun Semiconductors Ltd. NROM cell with self-aligned programming and erasure areas
US6168958B1 (en) * 1998-08-07 2001-01-02 Advanced Micro Devices Inc. Semiconductor structure having multiple thicknesses of high-K gate dielectrics and process of manufacture therefor
US6429063B1 (en) 1999-10-26 2002-08-06 Saifun Semiconductors Ltd. NROM cell with generally decoupled primary and secondary injection
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US6490204B2 (en) 2000-05-04 2002-12-03 Saifun Semiconductors Ltd. Programming and erasing methods for a reference cell of an NROM array
US6396741B1 (en) 2000-05-04 2002-05-28 Saifun Semiconductors Ltd. Programming of nonvolatile memory cells
US6614692B2 (en) 2001-01-18 2003-09-02 Saifun Semiconductors Ltd. EEPROM array and method for operation thereof
US6677805B2 (en) * 2001-04-05 2004-01-13 Saifun Semiconductors Ltd. Charge pump stage with body effect minimization
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US6636440B2 (en) 2001-04-25 2003-10-21 Saifun Semiconductors Ltd. Method for operation of an EEPROM array, including refresh thereof
US6643181B2 (en) 2001-10-24 2003-11-04 Saifun Semiconductors Ltd. Method for erasing a memory cell
US7098107B2 (en) * 2001-11-19 2006-08-29 Saifun Semiconductor Ltd. Protective layer in memory device and method therefor
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US6885585B2 (en) * 2001-12-20 2005-04-26 Saifun Semiconductors Ltd. NROM NOR array
US6700818B2 (en) 2002-01-31 2004-03-02 Saifun Semiconductors Ltd. Method for operating a memory device
US8673716B2 (en) * 2002-04-08 2014-03-18 Spansion Llc Memory manufacturing process with bitline isolation
US6917544B2 (en) 2002-07-10 2005-07-12 Saifun Semiconductors Ltd. Multiple use memory chip
US6826107B2 (en) * 2002-08-01 2004-11-30 Saifun Semiconductors Ltd. High voltage insertion in flash memory cards
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US7136304B2 (en) 2002-10-29 2006-11-14 Saifun Semiconductor Ltd Method, system and circuit for programming a non-volatile memory array
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US7221138B2 (en) * 2005-09-27 2007-05-22 Saifun Semiconductors Ltd Method and apparatus for measuring charge pump output current
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US3996655A (en) * 1973-12-14 1976-12-14 Texas Instruments Incorporated Processes of forming insulated gate field effect transistors with channel lengths of one micron in integrated circuits with component isolated and product
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DE2703877C2 (de) * 1977-01-31 1982-06-03 Siemens Ag, 1000 Berlin Und 8000 Muenchen MIS-Transistor von kurzer Kanallänge und Verfahren zu seiner Herstellung
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DE2847305C2 (de) * 1977-10-31 1985-01-17 Nippon Electric Co., Ltd., Tokio/Tokyo Verfahren zur Herstellung einer Halbleiterspeichervorrichtung mit schwebender Gateelektrode
DE2754066A1 (de) * 1977-12-05 1979-06-13 Siemens Ag Herstellung einer integrierten schaltung mit abgestuften schichten aus isolations- und elektrodenmaterial
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DE2802838A1 (de) * 1978-01-23 1979-08-16 Siemens Ag Mis-feldeffekttransistor mit kurzer kanallaenge
DE2832388C2 (de) * 1978-07-24 1986-08-14 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Herstellen von MNOS- und MOS-Transistoren in Silizium-Gate-Technologie auf einem Halbleitersubstrat
US4268951A (en) * 1978-11-13 1981-05-26 Rockwell International Corporation Submicron semiconductor devices
US4214359A (en) * 1978-12-07 1980-07-29 Bell Telephone Laboratories, Incorporated MOS Devices having buried terminal zones under local oxide regions
US4282646A (en) * 1979-08-20 1981-08-11 International Business Machines Corporation Method of making a transistor array
US4280855A (en) * 1980-01-23 1981-07-28 Ibm Corporation Method of making a dual DMOS device by ion implantation and diffusion

Also Published As

Publication number Publication date
EP0029554B1 (de) 1983-09-28
EP0029554A1 (de) 1981-06-03
DE2947350A1 (de) 1981-05-27
JPS5687371A (en) 1981-07-15
US4342149A (en) 1982-08-03

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