JPS62266829A - 浅い接合層の形成方法 - Google Patents

浅い接合層の形成方法

Info

Publication number
JPS62266829A
JPS62266829A JP11189886A JP11189886A JPS62266829A JP S62266829 A JPS62266829 A JP S62266829A JP 11189886 A JP11189886 A JP 11189886A JP 11189886 A JP11189886 A JP 11189886A JP S62266829 A JPS62266829 A JP S62266829A
Authority
JP
Japan
Prior art keywords
film
bonding layer
formation
shallow
junction layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11189886A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0466379B2 (enrdf_load_html_response
Inventor
Masahiro Hasegawa
正博 長谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP11189886A priority Critical patent/JPS62266829A/ja
Publication of JPS62266829A publication Critical patent/JPS62266829A/ja
Publication of JPH0466379B2 publication Critical patent/JPH0466379B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
JP11189886A 1986-05-14 1986-05-14 浅い接合層の形成方法 Granted JPS62266829A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11189886A JPS62266829A (ja) 1986-05-14 1986-05-14 浅い接合層の形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11189886A JPS62266829A (ja) 1986-05-14 1986-05-14 浅い接合層の形成方法

Publications (2)

Publication Number Publication Date
JPS62266829A true JPS62266829A (ja) 1987-11-19
JPH0466379B2 JPH0466379B2 (enrdf_load_html_response) 1992-10-23

Family

ID=14572897

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11189886A Granted JPS62266829A (ja) 1986-05-14 1986-05-14 浅い接合層の形成方法

Country Status (1)

Country Link
JP (1) JPS62266829A (enrdf_load_html_response)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6464315A (en) * 1987-09-04 1989-03-10 Toshiba Corp Manufacture of semiconductor integrated circuit
JPH0291932A (ja) * 1988-09-28 1990-03-30 Fujitsu Ltd 半導体装置の製造方法
JPH03214725A (ja) * 1990-01-19 1991-09-19 Nippon Telegr & Teleph Corp <Ntt> 半導体装置の製造方法
JPH04245424A (ja) * 1991-01-30 1992-09-02 Nippon Precision Circuits Kk 半導体装置の製造方法
WO1997013273A1 (en) * 1995-10-04 1997-04-10 Intel Corporation Formation of source/drain from doped glass
WO2014064873A1 (ja) * 2012-10-22 2014-05-01 シャープ株式会社 半導体装置の製造方法

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6464315A (en) * 1987-09-04 1989-03-10 Toshiba Corp Manufacture of semiconductor integrated circuit
JPH0291932A (ja) * 1988-09-28 1990-03-30 Fujitsu Ltd 半導体装置の製造方法
JPH03214725A (ja) * 1990-01-19 1991-09-19 Nippon Telegr & Teleph Corp <Ntt> 半導体装置の製造方法
JPH04245424A (ja) * 1991-01-30 1992-09-02 Nippon Precision Circuits Kk 半導体装置の製造方法
WO1997013273A1 (en) * 1995-10-04 1997-04-10 Intel Corporation Formation of source/drain from doped glass
WO2014064873A1 (ja) * 2012-10-22 2014-05-01 シャープ株式会社 半導体装置の製造方法
CN104756233A (zh) * 2012-10-22 2015-07-01 夏普株式会社 半导体器件的制造方法
JPWO2014064873A1 (ja) * 2012-10-22 2016-09-08 シャープ株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
JPH0466379B2 (enrdf_load_html_response) 1992-10-23

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